Overlay Metrology Target Layout for Device-Correlated SEM Measurement
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Solution Overview
Problem
Current semiconductor metrology techniques face challenges in accurately measuring overlay errors at advanced nanometer nodes due to the misalignment between optical overlay targets and real device patterns, particularly when feature sizes shrink, leading to yield loss and potential damage from electron beams during measurement.
Innovation Solution
The design of a device with a mat and extensions in a semiconductor device area, featuring a relaxed pitch for metrology targets that allow simultaneous secondary and back-scattered electron imaging, enabling effective overlay measurement without damaging the photoresist or device, and correlating with real device patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If optical overlay targets are used for measurement, then overlay measurement can be performed, but the measurement results do not correlate with real device overlay due to feature size and pattern differences
Solution Approach 1:
The patent applies local quality by creating device-like patterns specifically in the scribe line area while maintaining different patterns in the device area. The scribe line contains scaled-up versions of actual device patterns (e.g., 2x or 4x pitch) that locally resemble the real device structures, enabling measurement targets that are adaptable to specific device geometries while maintaining measurement capability
Solution Approach 2:
The patent changes the pitch parameter of metrology targets to match or scale with the pitch of actual device patterns. By adjusting the pitch parameter of overlay targets in the scribe line to be similar to or proportional to the device pitch, the measurement system achieves better correlation between measured overlay and actual device overlay, resolving the mismatch between optical targets and nanoscale devices
2Measurement precision
If high landing energy electron beam is used for overlay measurement, then overlay measurement can be performed on device area, but the electron beam damages the photoresist and device
Solution Approach 1:
The patent introduces an intermediary layer or structure that allows low-energy electron beam measurement. By using a measurement target design that can be imaged with low landing energy electrons (such as metal markers or specific contrast structures), the system achieves overlay measurement without the high-energy damage that would otherwise be required to see through the photoresist layer
Solution Approach 2:
The patent replaces the mechanical/electrical approach of high-energy electron bombardment with an optical detection approach. By using secondary electron detection and back-scattered electron imaging at low landing energies, the system substitutes the damaging high-energy electron interaction with a gentler detection mechanism that still provides measurement capability
3Object-affected harmful factors
If low landing energy electron beam is used for overlay measurement, then photoresist damage is reduced, but the previous layer pattern cannot be resolved due to insufficient electron penetration
Solution Approach 1:
The patent transitions from relying on electron penetration depth (vertical dimension) to utilizing electron scattering signals (horizontal/detection dimension). By detecting back-scattered electrons and secondary electrons that originate from the buried pattern, the system resolves patterns without requiring deep electron penetration, achieving both low damage and high resolution through signal detection rather than beam penetration
4Measurement precision
If SEM overlay measurement is performed on device area, then correlation with real device overlay is improved, but the measurement process becomes more complex and time-consuming
Solution Approach 1:
The patent applies preliminary action by pre-forming measurement targets in the scribe line that are specifically designed for SEM measurement. These targets include structures that are easily identifiable and measurable by SEM, with features optimized for electron beam detection. By preparing these targets in advance during the fabrication process, the actual measurement becomes simpler and more direct, reducing the complexity of the measurement process while maintaining high correlation with device overlay
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise overlay measurement and critical dimension analysis without damaging the photoresist, improving correlation with real device patterns and reducing yield loss by using a device-like layout for metrology targets, enabling effective control of photolithography processes.
Implementation Method 1
obtain a secondary electron image of the current layer and simultaneously obtain a back-scattered electron image of the previous layer
Implementation Method 2
obtain a back-scattered electron image of the previous layer with the relaxed pitch
Data Source
AI summary
A device area includes at least a first layer of photoresist and a second layer of photoresist. First layer metrology targets are positioned at an edge of one of the sides of the first layer of the mat. The first layer metrology targets have a relaxed pitch less than a device pitch. Secondary electron and back-scattered electron images can be simultaneously obtained.