Over-molded IC Package with Embedded Voltage Reference Plane and Heat Spreader
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Solution Overview
Problem
Conventional IC packaging technologies face challenges in achieving ultra-small form factor packages while effectively managing thermal dissipation, especially at high temperatures, as they often result in package assembly thicknesses that exceed 300 μm, making them unsuitable for thin devices.
Innovation Solution
The development of over-molded IC package assemblies with embedded voltage reference planes and heat spreaders, which include metallized vias and trenches within the molding compound to provide electrical connectivity and thermal management, allowing for reduced package thickness and enhanced thermal dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional molding techniques are used to enclose the IC chip, then the package assembly is fully enclosed and protected, but the package assembly thickness exceeds 300 μm
Solution Approach 1:
The patent extracts the back surface of the IC chip from the molding compound enclosure, creating an exposed-die configuration. This allows the package assembly thickness to be reduced below 300 μm while maintaining protection through alternative means such as underfill material and selective encapsulation of critical areas.
Solution Approach 2:
The patent embeds conductive layers, voltage reference planes, and heat spreaders within the molding compound structure. These nested components are integrated at different levels within the package assembly, enabling thermal management and electrical functionality without increasing overall package thickness.
2Length of moving object
If the IC chip thickness is reduced for ultra-small form factor, then the package assembly thickness is reduced, but thermal dissipation becomes more challenging
Solution Approach 1:
The patent nests heat spreaders and conductive thermal layers within the molding compound structure, positioning them in direct thermal contact with the IC chip. This nested configuration enables efficient heat dissipation from thin IC chips by conducting heat through the embedded thermal pathways to the package exterior.
Solution Approach 2:
The patent employs composite molding compounds with enhanced thermal conductivity, combining the encapsulation function with thermal management capabilities. The molding compound is formulated or structured to provide both mechanical protection and improved heat dissipation pathways.
3Length of moving object
If exposed-die molding is used to reduce package thickness, then package assembly thickness is reduced, but the IC chip cannot be fully enclosed by molding compound
Solution Approach 1:
The patent extracts the IC chip back surface from complete encapsulation, creating a controlled exposed-die structure. This simplifies the molding compound structure by eliminating the need for complex thick encapsulation layers, while alternative protection methods are applied selectively to critical areas.
4Reliability
If metallized vias and trenches are embedded in molding compound, then electrical connectivity and thermal management are improved, but manufacturing complexity increases
Solution Approach 1:
The patent incorporates metallized vias and trenches during the molding process itself, rather than adding them as separate post-processing steps. The molding compound is formulated to facilitate embedded conductive feature formation, and the molding tooling is designed to create these features in advance, reducing overall manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the creation of thinner IC packages with improved thermal management, suitable for ultra-small form factor applications, by embedding conductive features within the molding compound to facilitate both electrical connectivity and heat dissipation.
Implementation Method 1
embedded voltage reference planes and heat spreaders, which include metallized vias and trenches within the molding compound to provide electrical connectivity and thermal management
Implementation Method 2
metallized vias and trenches within the molding compound to provide electrical connectivity and thermal management
Data Source
AI summary
Over-molded IC package assemblies including an embedded voltage reference plane and/or heat spreader. In some embodiments, an over-molded package assembly includes a IC chip or die coupled to one or more metal distribution layer or package substrate. A molding compound encapsulates at least the IC chip and one or more conductive layers are embedded within the molding compound. The conductive layers may include an interior portion located over the IC chip and a peripheral portion located over the redistribution layers or package substrate. The interior portion may comprise one or more heat conductive features, which may physically contact a surface of the IC chip. In some further embodiments, the peripheral portion comprises one or more electrically conductive features, which may physically contact a surface of the package redistribution layers or package substrate to convey a reference voltage. One or more conductive traces may connect the conductive features in the interior with conductive features in the periphery.