Oversampled Signal Detection in High-Speed Serial Interfaces
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Solution Overview
Problem
Existing signal detection circuits in high-speed serial interfaces face challenges such as accuracy loss due to analog nature, static offset, and pattern dependencies, making it difficult to detect signals accurately at high speeds, especially in asynchronous protocols where timing issues can lead to missed detections.
Innovation Solution
The implementation of oversampled signal detection using a regenerative latch with programmable amplitude threshold and logic, such as a state machine, to determine signal presence, reduces the likelihood of missing signals by sampling multiple times per unit interval and using phase-offset clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If analog rectifier and integrator are used for signal detection, then signal detection function is provided, but accuracy is lost due to static offset and pattern dependencies
Solution Approach 1:
The patent replaces the analog rectifier and integrator system with a digital sampling and processing system. Instead of using analog components that introduce static offset and pattern dependencies, the invention uses digital sampling circuits to capture signal moments and digital logic to determine signal presence, thereby eliminating the accuracy losses inherent in analog processing.
Solution Approach 2:
The patent changes the detection approach from continuous analog measurement to discrete digital sampling. By sampling the signal at multiple moments within a unit interval and processing these discrete samples digitally, the system avoids the cumulative errors of analog integration while maintaining reliable signal detection capability.
2Device complexity
If single sampling per unit interval is used, then circuit complexity is reduced, but signal may be missed due to timing issues in asynchronous protocols
Solution Approach 1:
The patent divides the unit interval into multiple sampling moments, taking samples at different time points within each unit interval. This segmentation of the sampling process ensures that at least one sample will capture the signal correctly even in asynchronous protocols, thereby improving detection reliability without requiring a single complex high-speed sampler.
Solution Approach 2:
The patent uses multiple samples per unit interval, which is more than the minimum single sample required. This excessive sampling approach ensures that timing variations in asynchronous protocols do not cause missed detections, as at least one of the multiple samples will fall within the valid signal window.
3Speed
If high-speed peak detector with voltage follower is used, then signal detection speed is improved, but static offset occurs due to charge current being much higher than discharge current
Solution Approach 1:
The patent replaces the high-speed peak detector with a voltage follower configuration with digital sampling. Instead of relying on the analog peak detection mechanism that creates static offset due to asymmetric charge/discharge currents, the invention uses digital sampling to capture signal moments and processes these samples to determine signal presence, maintaining speed while eliminating the offset error.
4Reliability
If sense amplifier with extremely large bandwidth is used, then signal detection capability is improved, but design becomes very difficult
Solution Approach 1:
The patent replaces the complex high-bandwidth sense amplifier with a digital sampling system. Instead of designing an analog amplifier with extremely large bandwidth requirements, the invention uses sampling circuits that capture signal moments and digital logic that processes these samples, thereby achieving the same detection capability with significantly reduced design complexity.
Solution Approach 2:
The patent changes from analog bandwidth parameter optimization to digital sampling rate parameter optimization. By moving the critical performance parameter from analog bandwidth to digital sampling rate, the design becomes more manageable and less complex while maintaining or improving detection capability.
Data Source
AI summary
Signal detection circuitry for a serial interface oversamples the input—i.e., samples the input multiple times per clock cycle—so that the likelihood of missing a signal is reduced. Sampling may be done with a regenerative latch which has a large bandwidth and can latch a signal at high speed. The amplitude threshold for detection may be programmable, particularly in a programmable device. Thus, between the use of a regenerative latch which is likely to catch any signal that might be present, and the use of oversampling to avoid the problem of sampling at the wrong time, the likelihood of failing to detect a signal is greatly diminished. Logic, such as a state machine, may be used to determine whether the samples captured s do or do not represent a signal. That logic may be programmable, allowing a user to set various parameters for signal detection.