Oversampling PID Controller for Delta-Sigma ADC Integration
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Solution Overview
Problem
Digital controllers in process control applications require computationally intensive multiplications of control error signals with proportional, integral, and derivative gain parameters, leading to area-consuming integrated circuits and process-intensive computations in hardware implementations.
Innovation Solution
A digital controller structure employing an analog delta-sigma modulator to produce one-bit signals representing process characteristics and set-points, with a summer forming a control error signal and a control block using multiplexers to select partial sums for calculating the control signal, thereby avoiding the need for multi-bit multiplications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiplication of control error signal with control constants (KP, KI, KD) is implemented in dedicated digital hardware, then control precision is improved, but device area increases significantly
Solution Approach 1:
The patent replaces complex digital multiplication operations with a delta-sigma modulator that uses only addition and subtraction operations. The modulator converts the control error signal into a high-frequency bit stream, where the control constants are applied through simple accumulation rather than multiplication, dramatically reducing hardware area while maintaining control precision.
Solution Approach 2:
The patent changes the representation parameter of the control signal from standard digital words to a delta-sigma modulated bit stream. This parameter transformation allows the control constants to be applied through accumulation of binary values rather than traditional multiplication, reducing the computational complexity and hardware area requirements.
2Manufacturing precision
If multiplication operations are performed in dedicated digital hardware, then control accuracy is maintained, but manufacturing complexity increases
Solution Approach 1:
The patent substitutes complex multiplication logic with a delta-sigma modulator architecture that relies on simple adders, subtractors, and accumulators. This architectural substitution maintains control accuracy while dramatically simplifying the manufacturing process and reducing the number of logic gates required.
Solution Approach 2:
The patent segments the control signal processing into discrete time samples handled by the delta-sigma modulator. Each sample is processed independently through simple addition and subtraction operations, avoiding the need for complex simultaneous multiplication operations and reducing overall device complexity.
3Area of stationary object
If general-purpose digital processor is used for control computations, then device area is reduced, but processing speed decreases
Solution Approach 1:
The patent replaces software-based multiplication routines on general-purpose processors with hardware-based delta-sigma modulation that performs control computations through parallel addition and subtraction operations. This hardware implementation achieves both compact area and high processing speed by eliminating the need for sequential software execution.
Data Source
AI summary
An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller.