Oversampling Receiver Phase Adjustment Using Population Difference
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Solution Overview
Problem
Modern digital communication systems face challenges in accurately recovering symbol timing without explicit frequency and phase information, especially in time-variant and distorted channels like wireless and optical channels, where existing methods fail to minimize bit error rates due to high complexity and processing requirements.
Innovation Solution
A sampling phase adjustment method that maximizes the population difference parameter using counters and dedicated circuits to optimize the sampling phase, reducing bit error rates by adjusting the sampling phase based on the difference in amplitude statistics between two sampling instants, even in severely distorted channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If self-timing methods are used to recover symbol timing without explicit frequency and phase information, then receiver complexity is reduced, but measurement precision of sampling phase deteriorates
Solution Approach 1:
The patent implements dynamic sampling phase adjustment by continuously updating the sampling phase based on real-time population difference calculations. The system transitions from static fixed-phase sampling to dynamic adaptive sampling, where the sampling phase is continuously optimized based on signal characteristics, thereby maintaining measurement precision while using simplified self-timing architecture.
Solution Approach 2:
The patent employs feedback mechanisms by calculating the population difference between two sampling phases and using this information to adjust the sampling phase. The system measures the signal population at different phases, compares the differences, and feeds this information back to optimize the sampling timing, ensuring high precision without complex receiver structures.
2Reliability
If sampling phase is adjusted to minimize bit error rate in distorted channels, then reliability improves, but device complexity increases due to additional processing circuits
Solution Approach 1:
The patent segments the sampling process into two distinct phases: sampling at phase φ and sampling at phase φ+π. By dividing the sampling operation into these two segments and comparing the population differences, the system achieves reliable bit error rate performance in distorted channels while keeping the processing circuitry relatively simple and modular.
Solution Approach 2:
The patent changes the sampling phase parameter dynamically based on channel conditions. By adjusting the sampling phase to maximize the population difference between the two sampling points, the system adapts to distorted channels and maintains low bit error rates without requiring complex equalization or filtering circuits.
3Manufacturing precision
If population difference parameter is maximized to determine optimal sampling phase, then manufacturing precision of timing recovery improves, but loss of time increases due to processing multiple samples
Solution Approach 1:
The patent applies partial action by using only the population difference between two specific sampling phases (φ and φ+π) rather than analyzing all possible phase positions. This selective approach achieves sufficient timing recovery precision without requiring exhaustive processing of all sampling possibilities, thereby reducing the time loss while maintaining manufacturing precision of the timing recovery.
Data Source
AI summary
This invention discloses a self-timing method for phase adjustment. An analog signal is digitized at a first and second phase with respect to the symbols comprised in an analog signal in order to obtain first and second quantized samples. Then a first counter out of a first plurality of counters is increased if said first quantized sample has a first digital value to which said first counter is associated. Moreover a second counter out of a second plurality of counters is increased if a second quantized sample has a second digital value to which the second counter is associated. Finally the sampling phase is adjusted based on the values of the counters of the first and second plurality of counters. Moreover a digitizing, self-timing circuit is disclosed.