Overshoot Current Detection Circuit for EFT-Clamped Bus Drivers
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Solution Overview
Problem
Wireline transceivers in applications like motor position encoders face issues with electrical fast transients (EFT) causing sudden spikes in current and voltage, leading to missed bits and corruption of digital/analog signals due to overshoot current being sunk by silicon controlled rectifiers (SCRs) during EFT strikes.
Innovation Solution
Incorporation of overshoot current detection circuits comprising transistors, current mirrors, reference current sources, and comparators to generate signals that adjust driver operations, ensuring reliable data transmission by boosting current and overriding comparator outputs during EFT events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clamping circuit sinks the overshoot current during the overshoot period, then the voltage on the bus line is clamped, but the driver cannot generate differential voltage resulting in missed bits
Solution Approach 1:
The detection circuit monitors the overshoot current before it completely suppresses the driver output, and the control circuit proactively adjusts the driver operation in advance to prevent missed bits. By detecting the overshoot condition early and taking corrective action beforehand, the system maintains data transmission reliability during the clamping period.
Solution Approach 2:
The detection circuit continuously monitors the overshoot current and provides feedback to the control circuit, which then adjusts the driver operation accordingly. This closed-loop feedback mechanism allows the system to dynamically respond to EFT conditions and maintain reliable data transmission by coordinating driver activity with the clamping circuit operation.
2Reliability
If the SCR shunts the load to ground in response to voltage greater than triggering voltage, then voltage spikes are suppressed, but other digital or analog signals are corrupted and operation of other circuits is impaired
Solution Approach 1:
The system separates the EFT protection function into distinct components: the SCR for voltage clamping, the detection circuit for monitoring, and the control circuit for coordinated response. This segmentation allows the SCR to suppress voltage spikes while the detection and control circuits manage the impact on other signals, preventing widespread corruption by isolating and managing different aspects of the protection response.
Solution Approach 2:
The detection circuit and control circuit act as intermediaries between the SCR clamping action and the rest of the system. They monitor the EFT condition and coordinate the driver response, serving as a buffer that prevents the direct impact of SCR operation from corrupting other digital or analog signals while still maintaining effective voltage spike suppression.
Data Source
AI summary
A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.