Oversized Interposer via Multi-Pattern Region Mask Stitching
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Solution Overview
Problem
Conventional interposers are limited in size due to the maximum field size restrictions of lithographic scanners, which restricts the integration of more and larger integrated circuit dies, hindering the advancement of integrated circuit technology.
Innovation Solution
The development of an oversized interposer is achieved through multistep imaging using a multi-pattern region mask, allowing for the stitching of interconnect slices together with double-seam regions, enabling the creation of interposers with dimensions greater than the conventional reticle field size limits by dividing interconnects into image slices and lithographically stitching them together.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional lithographic scanning is used, then manufacturing process is simple, but interposer size is limited by maximum reticle field size
Solution Approach 1:
The mask is divided into multiple pattern regions (first pattern region, second pattern region, third pattern region) that can be imaged separately in different lithographic steps. This segmentation allows the interposer design to exceed the reticle field size limit by combining multiple imaged regions, directly resolving the contradiction between achieving larger interposer size and maintaining simple manufacturing processes.
Solution Approach 2:
The lithographic process uses periodic shuttering of different pattern regions in sequence. The shutter is opened for specific pattern regions during different exposure cycles, enabling multiple regions to be imaged on the wafer through repeated periodic actions. This allows the interposer area to be expanded beyond single-step limitations while maintaining process control.
2Adaptability or versatility
If interposer size is increased to accommodate more and larger IC dies, then IC integration capability is improved, but lithographic processing time and cost increase
Solution Approach 1:
By segmenting the mask into multiple pattern regions that can be processed in parallel on different wafer batches, the system can accommodate more IC dies without proportionally increasing processing time for each individual region. The first, second, and third pattern regions can be manufactured using efficient batch processing.
Solution Approach 2:
The multi-pattern region mask serves multiple functions: it can produce different interposer configurations by selectively imaging different regions, accommodate various IC die arrangements, and maintain compatibility with existing lithographic equipment. This multi-functionality enhances adaptability without requiring dedicated processing time for each configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of interposers with dimensions larger than conventional limits, accommodating more and larger integrated circuit dies, thereby enhancing performance and increasing pin-count density, while also reducing lithographic processing time and costs.
Implementation Method 1
The first pattern region and the second pattern region are imaged onto the resist layer to respectively print an instance of a first printed circuit region and a first instance of a second printed circuit region
Data Source
AI summary
An embodiment of an interposer is disclosed. In such an embodiment, there is a first printed circuit region and a second printed circuit region. The second printed circuit region is proximate to the first printed circuit region with a seam region between the first printed circuit region and the second printed circuit region. The seam region includes a first die seal and a second die seal spaced apart from one another with a scribe line located between the first die seal and the second die seal.