Overvoltage Protection Circuit Using Self-Regulating Transistors
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Solution Overview
Problem
Existing overvoltage protection devices that employ charge pumps or voltage regulators to control gate voltage introduce complexity, high power consumption, and require additional clamps, which increase circuit area and power usage.
Innovation Solution
An overvoltage protection device comprising a switch circuit with NMOS and PMOS transistors connected in series and parallel, along with voltage generation circuits that generate and apply specific voltages to the transistors, eliminating the need for a charge pump or voltage regulator and clamp, thereby reducing component count and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a charge pump or voltage regulator is used to control gate voltage of protection switches, then the overvoltage protection function is achieved, but the device complexity increases
Solution Approach 1:
The patent extracts and eliminates the charge pump or voltage regulator components from the overvoltage protection circuit. Instead of using these complex voltage control devices, the invention directly connects the protection switches to the input voltage source, allowing the switches themselves to control the gate voltage without requiring separate voltage generation circuits.
Solution Approach 2:
The protection switches perform multiple functions: they act as both the overvoltage protection element and the voltage control mechanism. By making the switches universal components that handle both protection and voltage regulation, the patent eliminates the need for separate charge pumps or voltage regulators, thereby reducing device complexity while maintaining protection functionality.
2Reliability
If a charge pump or voltage regulator is used in the overvoltage protection device, then gate voltage control is achieved, but power consumption increases
Solution Approach 1:
The patent removes the power-consuming charge pump or voltage regulator components from the circuit. By eliminating these active voltage generation devices, the invention significantly reduces power consumption while maintaining effective gate voltage control through the protection switches alone.
Solution Approach 2:
The protection switches self-regulate their gate voltage directly from the input voltage source without requiring external power supply circuits. This self-service mechanism eliminates the need for continuously powered voltage regulators, thereby reducing overall power consumption of the protection device.
3Reliability
If a clamp is added to protect input pins and switches, then protection is improved, but circuit area increases
Solution Approach 1:
The protection switches serve dual purposes: they provide overvoltage protection for the downstream circuitry and simultaneously protect the input pins and themselves from voltage spikes. This multi-functionality eliminates the need for separate clamp components, thereby reducing circuit area while maintaining comprehensive protection.
Solution Approach 2:
The patent merges the protection function into the existing switch structure, combining multiple protection roles into a single integrated solution. By merging the overvoltage protection and input pin protection functions into the same switch component, the invention eliminates the need for additional clamp circuits, thus reducing overall circuit area.
Data Source
AI summary
Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.