Ovonic Threshold Switch Memory Refresh Voltage Strategy

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Solution Overview

Problem

Existing memory devices face reliability issues due to the narrowing voltage window between threshold states, leading to erroneous data reading and performance deterioration, particularly during refresh operations where the threshold voltage distribution is not adequately maintained.

Innovation Solution

A memory device that employs a dual refresh voltage strategy, where a first refresh voltage is applied to all memory cells and a second, higher refresh voltage is selectively applied only to cells with threshold voltages above a certain threshold, ensuring a wider voltage window and improved reliability by adjusting the threshold voltages during refresh operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single refresh voltage is applied to all memory cells, then the refresh operation is simple and fast, but the voltage window between threshold states narrows leading to reliability issues

Engineering Contradiction:
Improvedata reading reliabilityVSAvoidrefresh operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies different refresh voltages to different memory cells based on their threshold voltage characteristics. Memory cells with threshold voltages below a reference voltage receive a first refresh voltage, while cells with threshold voltages above the reference voltage receive a second refresh voltage (higher than the first). This local differentiation maintains adequate voltage windows for reliable reading while avoiding unnecessary high voltage applications to all cells.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The refresh operation is segmented into two distinct phases: a first refresh operation applying a first refresh voltage to all memory cells, and a second refresh operation applying a higher second refresh voltage only to a subset of memory cells identified as needing it. This segmentation allows the system to maintain reliability for cells requiring it while simplifying the overall process by avoiding universal high voltage application.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a higher refresh voltage is applied to all memory cells to maintain voltage window, then reading reliability improves, but power consumption increases

Engineering Contradiction:
Improvevoltage window maintenanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Instead of uniformly applying high refresh voltage to all memory cells, the system identifies and applies higher voltage only to specific cells (second refresh cells) that have threshold voltages above the reference voltage and require it to maintain adequate voltage windows. This localized approach maintains reliability where needed while significantly reducing overall power consumption compared to universal high voltage application.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies partial action by providing the higher second refresh voltage only to the subset of memory cells that actually require it (those with threshold voltages above the reference), rather than excessively applying it to all cells. This partial application of the higher voltage ensures adequate voltage window maintenance for affected cells while avoiding unnecessary energy consumption from over-application to cells that do not need it.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If threshold voltage distribution is not maintained during refresh operations, then operation is simpler, but erroneous data reading occurs

Engineering Contradiction:
Improvedata reading accuracyVSAvoidthreshold voltage management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent maintains threshold voltage distribution by applying different refresh voltages to different cell groups. Memory cells with threshold voltages below the reference voltage receive the first refresh voltage, while cells with threshold voltages above the reference voltage receive the higher second refresh voltage. This local differentiation ensures that each cell group maintains its threshold voltage characteristics, preventing erroneous readings while managing complexity through systematic classification.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The refresh operation incorporates feedback by first determining which memory cells are second refresh cells (those with threshold voltages above the reference voltage) before applying the higher second refresh voltage. This feedback mechanism ensures that threshold voltage distribution is maintained by targeting the higher voltage only where needed, thereby preventing erroneous data reading while avoiding unnecessary complexity in cells that do not require it.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of the memory device by maintaining a sufficient voltage window between threshold states, reducing errors in data reading and minimizing the need for additional post-programming voltage applications, thus improving overall performance and reducing power consumption.

Implementation Method 1

each of the plurality of memory cells including an Ovonic threshold switch element and a memory element connected to each other in series

Methodology Applied
Scientific EffectOvonic threshold switching:

Data Source

PatentUS11631458B2Memory device including an ovonic threshold switch element and a method of operating thereof
Publication Date: 2023.04.18 SAMSUNG ELECTRONICS CO LTD
  • US11631458B2 patent drawing
  • US11631458B2 patent drawing
  • US11631458B2 patent drawing

AI summary

A memory device includes a cell area in which a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the plurality of word lines and the plurality of bit lines are disposed, each of the plurality of memory cells including an Ovonic threshold switch element and a memory element connected to each other in series, and a peripheral circuit area including at least one peripheral circuit, configured to input a first refresh voltage turning on the Ovonic threshold switch element to each of at least some refresh cells among the plurality of memory cells to execute a refresh operation, determine each of the refresh cells as a first refresh cell in a first state or a second refresh cell in a second state while the Ovonic threshold switch element is turned on, and input a second refresh voltage, different to the first refresh voltage, to the second refresh cell.