Oxide-to-Oxide Bonding for Multi-Level Semiconductor Devices
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Solution Overview
Problem
Current methods for constructing RGB LEDs, image sensors, displays, and solar cells face challenges such as high costs, inefficiencies, and thermal expansion coefficient mismatches, which hinder the development of more efficient and cost-effective devices.
Innovation Solution
The use of monolithic 3D integration techniques, including ion-cut, porous silicon approaches, and oxide-to-oxide bonding, allows for the construction of multi-level semiconductor devices with crystalline silicon and integrated circuits, enabling efficient layer transfer and bonding at lower temperatures, thus overcoming thermal expansion issues and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bonding methods are used to construct multi-level semiconductor devices, then device integration is achieved, but thermal expansion coefficient mismatches cause bonding failures and device reliability issues
Solution Approach 1:
The patent introduces an intermediate oxide layer (silicon dioxide) between dissimilar semiconductor materials with different thermal expansion coefficients. This oxide intermediary accommodates thermal expansion differences through its own expansion properties and compliance, preventing bonding failure while enabling reliable integration of materials such as silicon with GaAs, GaN, or other III-V semiconductors that would otherwise be incompatible due to thermal mismatch.
2Strength
If high temperature processing is used for layer transfer and bonding, then strong bonds are formed, but substrate damage and device degradation occur
Solution Approach 1:
The patent fundamentally changes the temperature parameter for bonding operations by utilizing oxide-to-oxide bonding mechanisms that achieve strong, reliable bonds at low temperatures (below 400°C). This is accomplished through surface preparation of oxide layers, controlled bonding pressure, and atmospheric conditions that enable oxide bond formation without requiring high thermal energy, thereby preventing substrate damage while maintaining bond strength.
3Adaptability or versatility
If multiple dissimilar materials are integrated in the same device, then device functionality is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the device into distinct levels or tiers, with each level comprising dissimilar semiconductor materials optimized for specific functions (e.g., photodetectors at one level, LEDs at another, solar cells at a third). The oxide intermediary layers between levels provide a standardized bonding interface that simplifies the integration process, allowing each segment to be manufactured and tested independently before final assembly, thereby reducing overall manufacturing complexity despite the diversity of materials.
4Productivity
If conventional single-level device construction is used, then manufacturing processes are simple, but device efficiency and performance are limited
Solution Approach 1:
The patent transitions from conventional single-level (2D) device construction to multi-level (3D) stacked architectures. By stacking multiple functional layers vertically with oxide intermediaries enabling reliable bonding between levels, the device achieves enhanced efficiency through better light management, reduced parasitic effects, and optimized material utilization. The vertical dimension adds functionality without significantly increasing lateral footprint, improving productivity while managing structural complexity through standardized bonding interfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of more efficient and cost-effective RGB LEDs, image sensors, displays, and solar cells by allowing for the integration of multiple layers at lower temperatures, improving thermal management and reducing production costs while enhancing device performance.
Implementation Method 1
an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds
Data Source
AI summary
A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the integrated circuits include at least one processor, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.