Oxide Semiconductor Holding Capacitance Recess for Display Parasitic Reduction
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Solution Overview
Problem
In active-drive liquid crystal and organic electroluminescence display devices, parasitic capacitance in the crossing region of gate and source/drain electrodes leads to signal voltage variations, degrading image quality and increasing the probability of inter-wiring shorts, which reduces production yield.
Innovation Solution
A holding capacitance element with a recess formed by removing part or all of the conductive and insulating films in a selective region on an oxide semiconductor layer, reducing capacitance variation and maintaining desired capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a holding capacitance element is provided to compensate for parasitic capacitance, then image quality degradation is suppressed, but wiring occupancy increases leading to higher inter-wiring short probability
Solution Approach 1:
The holding capacitance element is merged with the transistor structure by sharing the gate electrode and gate insulating film. The gate electrode serves dual functions as both the transistor gate and the holding capacitance electrode, eliminating the need for separate holding capacitance wiring and reducing wiring occupancy in the pixel layout.
Solution Approach 2:
The gate electrode and gate insulating film are designed to serve multiple functions simultaneously: controlling the transistor channel and forming the holding capacitance element. This multi-functionality reduces the total number of components and wiring required, thereby reducing inter-wiring short probability while maintaining image quality.
Data Source
AI summary
A display device includes a substrate, a display element, a transistor as a drive element of the display element, and a holding capacitance element holding electric charge corresponding to a video signal. The display element, the transistor, and the holding capacitance element are provided on the substrate. The holding capacitance element includes a first semiconductor layer including an oxide semiconductor, a first conductive film provided on the first semiconductor layer, a first insulating film provided between the first semiconductor layer and the first conductive film, and a recess formed by removing part or all in thickness of the first conductive film and the first insulating film in a selective region on the first semiconductor layer.