Via Opening Profile Control Using Oxide Etch-Resistant Caps
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The formation of tiger tooth-like recesses in gate dielectric caps during the etching process for via openings in integrated circuits increases the risk of leakage current and reduces the vertical profile of the via openings, leading to increased contact resistance between source/drain vias and underlying contacts.
Innovation Solution
Incorporating an oxide-based layer on the gate dielectric caps with different etch selectivity to slow down the liner removal etching process, preventing the formation of tiger tooth-like patterns and ensuring a more vertical via opening profile.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the liner removal etching process is performed to form via openings, then the via openings are created, but tiger tooth-like recesses form in the gate dielectric caps causing leakage current and non-vertical profiles
Solution Approach 1:
An oxide-based layer is introduced as an intermediary between the gate dielectric cap and the etching process. This layer acts as a protective mediator that modulates the etching rate, preventing direct aggressive etching of the gate dielectric cap that causes tiger tooth-like recesses. The oxide layer is selectively removed after via formation, having served its protective function during the critical etching phase.
Solution Approach 2:
The oxide-based layer is deposited on the gate dielectric cap before the liner removal etching process begins. This preliminary action prepares the surface in advance to resist excessive etching, ensuring that when the etching process starts, the gate dielectric cap is protected from forming tiger tooth-like recesses. The protective layer is already in place to control the etching rate from the outset.
2Productivity
If the etching process proceeds rapidly to increase productivity, then via openings are formed faster, but tiger tooth-like patterns form increasing leakage current risk
Solution Approach 1:
The oxide-based layer serves as a mediator that allows rapid etching to proceed while protecting the gate dielectric cap. It controls the etching rate uniformly, preventing the formation of tiger tooth-like patterns that cause leakage current. The intermediary layer ensures that high productivity does not compromise reliability by maintaining profile control even during fast etching processes.
3Device complexity
If no protective layer is used during etching, then the process is simpler, but the via opening profile becomes non-vertical increasing contact resistance
Solution Approach 1:
The oxide-based layer is introduced as a temporary intermediary that ensures vertical via opening profiles during etching. Although it adds a step to the process structure, it prevents the formation of non-vertical profiles that would increase contact resistance. The layer is selectively removed after serving its protective function, ensuring that the additional complexity is minimal compared to the benefit of reduced contact resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the risk of leakage current and enhances the contact area between source/drain vias and contacts, thereby decreasing contact resistance and improving the integrity of the circuit.
Implementation Method 1
Incorporating an oxide-based layer on the gate dielectric caps with different etch selectivity to slow down the liner removal etching process
Data Source
AI summary
A device includes source/drain epitaxial structures over a substrate, source/drain contacts over the source/drain epitaxial structures, respectively, a gate structure laterally between the source/drain contacts, a gate dielectric cap over the gate structure, an oxide-based etch-resistant layer over the gate dielectric cap, a nitride-based etch stop layer over the oxide-based etch-resistant layer, and an interlayer dielectric (ILD) layer over the nitride-based etch stop layer. The device further includes a via structure extending through the ILD layer, the nitride-based etch stop layer, and the oxide-based etch-resistant layer to electrically connect with the one of the source/drain contacts.