Polycrystalline Oxide Channel Layer With Transition Metal Liner

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Solution Overview

Problem

Existing technologies face challenges in advancing the formation of oxide semiconductor layers for transistors, which limits the performance and efficiency of semiconductor devices.

Innovation Solution

A semiconductor device is developed that includes a substrate with a stack structure of gate patterns and interlayer insulating films, an insulating pillar, a polycrystalline metal oxide film along the insulating pillar's sidewall, a liner film with a transition metal between the insulating pillar and the polycrystalline metal oxide film, and tunnel, charge storage, and blocking insulating films between the polycrystalline metal oxide film and the gate patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional oxide semiconductor layer formation methods are used, then the process follows standard fabrication procedures, but the crystallinity and electrical characteristics are insufficient

Engineering Contradiction:
Improvecrystallinity of oxide semiconductor layerVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

A transition metal layer (Ti, V, Cr, Mn, Fe, Co, Ni, Cu, or Zn) is introduced as an intermediary between the oxide semiconductor layer and the gate electrode. This transition metal layer mediates the crystallization process, enabling the formation of a polycrystalline oxide semiconductor channel layer with enhanced crystallinity through interaction with the gate electrode during annealing, while maintaining compatibility with standard fabrication processes

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the physical and chemical parameters of the oxide semiconductor layer by controlling the annealing process in the presence of the transition metal layer and gate electrode. By adjusting annealing temperature (e.g., 200-400°C), atmosphere, and duration, the oxide semiconductor transforms from amorphous to polycrystalline state, improving field-effect mobility and subthreshold swing characteristics

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If high temperature annealing is used to improve crystallinity, then the oxide semiconductor layer achieves better electrical characteristics, but the fabrication process becomes more complex and costly

Engineering Contradiction:
Improvefield-effect mobility of transistorVSAvoidannealing temperature
Core Design Contradiction:
Manufacturing precisionVSTemperature

Solution Approach 1:

The transition metal layer serves as a mediator that enables effective crystallization at lower temperatures (200-400°C) by facilitating atomic rearrangement and grain growth through its unique properties, eliminating the need for high-temperature processing while achieving the desired polycrystalline structure and electrical characteristics

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the annealing temperature parameter from conventional high temperatures (>700°C) to a lower range (200-400°C) by introducing the transition metal layer, which acts as a catalyst for crystallization. This parameter change simplifies the fabrication process, reduces energy consumption, and prevents damage to other device components while achieving superior electrical characteristics

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables the formation of a polycrystalline metal oxide channel layer at a relatively lower temperature, enhancing the crystallinity and electrical characteristics of the semiconductor device, such as field-effect mobility and subthreshold swing.

Implementation Method 1

a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS12211940B2Thin film transistor and vertical non-volatile memory device including transition metal-induced polycrystalline metal oxide channel layer
Publication Date: 2025.01.28 SAMSUNG ELECTRONICS CO LTD
  • US12211940B2 patent drawing
  • US12211940B2 patent drawing
  • US12211940B2 patent drawing

AI summary

The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.