Oxide-Conductor Contact Layout for Miniaturized Semiconductor Memory

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Solution Overview

Problem

Current semiconductor devices face challenges in miniaturization, high integration, favorable electrical and frequency characteristics, reliability, productivity, long-term data retention, high-speed data writing, design flexibility, and reduced power consumption.

Innovation Solution

A semiconductor device is designed with a structure that includes a first oxide, an insulator, a first conductor, a second conductor electrically connected to the first oxide, and a second oxide between the first oxide and the second conductor, where the contact area between the second oxide and the second conductor is larger than the contact area between the second oxide and the first oxide.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the contact area between oxide and conductor is increased to improve electrical characteristics, then the device area increases, but miniaturization is hindered

Engineering Contradiction:
Improveelectrical characteristicsVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent applies local quality by creating different contact area relationships in different regions of the device. Specifically, the second oxide has a larger contact area with the second conductor than with the first oxide, optimizing electrical characteristics locally at the conductor-oxide interface while maintaining overall device miniaturization.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a multi-layer vertical structure with first oxide, second oxide, first conductor, and second conductor arranged in different dimensions. This vertical stacking approach allows increased contact area in the vertical dimension without expanding the horizontal device footprint, resolving the contradiction between electrical characteristics and miniaturization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If transistor density is increased to achieve high integration, then the number of transistors per unit area increases, but manufacturing precision requirements become more stringent

Engineering Contradiction:
Improvetransistor densityVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the oxide layer into first oxide and second oxide with different contact area relationships to different conductors. This segmentation allows independent optimization of electrical characteristics for each transistor region, enabling high transistor density while maintaining manageable manufacturing precision requirements through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12300484B2Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2025.05.13 SEMICON ENERGY LAB CO LTD
  • US12300484B2 patent drawing
  • US12300484B2 patent drawing
  • US12300484B2 patent drawing

AI summary

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first oxide, an insulator over the first oxide, a first conductor over the insulator, a second conductor electrically connected to the first oxide, and a second oxide provided between the first oxide and the second conductor, and the contact area between the second oxide and the second conductor is larger than the contact area between the second oxide and the first oxide.