Oxide Semiconductor Contact Structure for Short-Channel Vth Control
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Solution Overview
Problem
The scaling-down of oxide semiconductor devices leads to short-channel effects, making it difficult to control threshold voltage (Vth) and increasing contact resistance due to reduced dimensions and reaction between metal precursors, which degrades performance.
Innovation Solution
A semiconductor device structure incorporating a metal nitride layer between the oxide semiconductor layer and a metal oxide layer, with the metal nitride layer having a higher oxygen content than the metal oxide layer, to reduce oxygen diffusion and reactiveness, thereby controlling contact resistance and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If oxide semiconductor devices are scaled down to increase degree of integration, then device density is improved, but contact resistance increases and Vth control becomes difficult
Solution Approach 1:
A metal nitride layer is introduced as an intermediary between the metal oxide layer and the oxide semiconductor layer. This intermediate layer prevents direct contact and harmful reactions between the metal oxide and oxide semiconductor, thereby reducing contact resistance and improving electrical characteristics while allowing continued device scaling
Solution Approach 2:
The patent employs a composite structure consisting of multiple layers with different material properties: a metal oxide layer providing oxygen supply, a metal nitride layer providing barrier and interface control, and an oxide semiconductor layer providing semiconductor functionality. This composite approach allows optimization of each layer's properties to collectively solve the contact resistance problem during scaling
2Length of moving object
If the channel layer dimensions are reduced, then device size is decreased, but Vth control becomes difficult due to short-channel effects
Solution Approach 1:
The patent controls the thickness and composition parameters of the metal oxide and metal nitride layers to optimize electrical characteristics. By precisely controlling layer thicknesses (metal oxide layer thicker than metal nitride layer) and material compositions, the invention maintains effective Vth control even in scaled-down devices with reduced channel dimensions
3Device complexity
If a metal precursor is used to form oxide semiconductor layer on metal source/drain, then device structure is simplified, but contact resistance increases due to reaction between precursor and metal material
Solution Approach 1:
The metal nitride layer serves as a protective intermediary between the metal oxide layer (containing metal precursor) and the oxide semiconductor layer. This intermediate barrier prevents harmful reactions between the metal precursor and metal source/drain regions, reducing contact resistance while maintaining the simplified device structure
Solution Approach 2:
The patent converts the potentially harmful reaction between metal precursor and metal material into a beneficial process by controlling the formation of a metal oxide layer that, when combined with the metal nitride layer, creates an optimized interface with improved electrical characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of a metal nitride layer with controlled thickness and composition enhances the electrical characteristics of the semiconductor device by reducing contact resistance and improving on-current density, addressing the short-channel effects and maintaining performance in miniaturized devices.
Implementation Method 1
a metal nitride layer between the metal oxide layer and the oxide semiconductor layer
Data Source
AI summary
A semiconductor device includes an oxide semiconductor layer, a first electrode and a second electrode, which are arranged apart from each other on the oxide semiconductor layer, a metal oxide layer arranged between the oxide semiconductor layer and at least one of the first electrode and the second electrode, and a metal nitride layer arranged between the metal oxide layer and the oxide semiconductor layer.