Oxide Semiconductor Display Layout for Lower Parasitic Capacitance
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Solution Overview
Problem
In transmissive liquid crystal display devices, the integration of a light-shielding layer as a back gate electrode increases parasitic capacitance between wires, leading to degradation in display quality, especially with the demand for smaller switching elements that can handle larger currents.
Innovation Solution
The display device incorporates an oxide semiconductor layer that overlaps openings in the light-shielding layer, reducing parasitic capacitance while maintaining the aperture ratio by using a transparent amorphous oxide semiconductor material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the light-shielding layer is electrically connected to the gate electrode to serve as a back gate electrode, then the switching element can pass a larger amount of current, but parasitic capacitance between wires increases
Solution Approach 1:
The oxide semiconductor layer is positioned to overlap the light-shielding layer in the vertical dimension (thickness direction) rather than extending horizontally between wires. This spatial reconfiguration reduces parasitic capacitance while maintaining the back gate electrode functionality through vertical overlap, resolving the contradiction between current passing capability and parasitic capacitance reduction.
2Area of moving object
If the switching element size is reduced to increase resolution, then more pixels can be accommodated, but the element becomes more sensitive to parasitic capacitance effects
Solution Approach 1:
By utilizing the vertical overlap configuration between the oxide semiconductor layer and light-shielding layer, the patent reduces parasitic capacitance without increasing the horizontal footprint of the switching element. This allows smaller element sizes to be implemented while maintaining display quality through reduced parasitic effects.
3Object-generated harmful factors
If the oxide semiconductor layer overlaps the light-shielding layer, then parasitic capacitance is reduced, but the aperture ratio must be maintained
Solution Approach 1:
The oxide semiconductor layer overlaps the light-shielding layer in the vertical dimension (thickness direction) rather than extending in the horizontal plane. This vertical configuration reduces parasitic capacitance while minimizing impact on the aperture ratio, as the overlap occurs primarily in the thickness direction where it does not significantly block light transmission areas.
Solution Approach 2:
The oxide semiconductor layer is positioned to overlap specifically with the light-shielding layer in regions where it provides electrical functionality without significantly blocking light transmission. This localized positioning allows parasitic capacitance reduction while preserving aperture ratio in critical light transmission areas.
Data Source
AI summary
According to one embodiment, a display device includes a gate line extending in a first direction, first and second source lines crossing the gate line and arranged in the first direction, a first light-shielding layer having first and second openings, and an oxide semiconductor layer crossing the gate line, and in the display device, the first opening and the second opening are arranged in a second direction crossing the first direction between the first source line and the second source line, the gate line is located between the first opening and the second opening, and the oxide semiconductor layer has a first overlapping portion overlapping the first opening.