Oxide Dummy Gate Replacement for FinFET Fabrication
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Solution Overview
Problem
The existing replacement gate process flow for fabricating finFET devices faces challenges in completely removing polysilicon dummy gate material, leading to residual material that can cause device defects due to the inability of typical removal techniques to differentiate between the dummy gate and surrounding structures.
Innovation Solution
The use of an oxide dummy gate material with additional protective layers, such as SiCBN or amorphous silicon, that are resistant to etching techniques, allowing for selective removal of the dummy gate without damaging surrounding structures, and the implementation of gap fill layers and dielectric liners to prevent unwanted removal during the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If polysilicon dummy gate material is used in replacement gate process, then the dummy gate can be formed on substrate, but typical removal techniques cannot completely remove the polysilicon dummy gate material leaving residual material that causes device defects
Solution Approach 1:
The patent changes the material parameter of the dummy gate from polysilicon to oxide material. This parameter change enables complete removal of the dummy gate material through etching techniques that selectively remove oxide without leaving residual material, thereby preventing device defects while maintaining the replacement gate process functionality.
Solution Approach 2:
The oxide dummy gate material is designed as a temporary, disposable structure that can be completely removed after serving its purpose as a placeholder during fabrication. The material is chosen specifically for its ease of removal compared to polysilicon, allowing complete elimination without residual damage to the device.
2Manufacturing precision
If alternate dummy gate material is used that can be easily removed, then complete removal of dummy gate material is achieved, but additional protective layers are required to prevent removal of surrounding structures
Solution Approach 1:
The patent introduces protective layers as intermediary structures that temporarily shield surrounding dielectric materials during the dummy gate removal process. These protective layers act as mediators between the etching process and the surrounding structures, allowing complete removal of the oxide dummy gate while preventing unintended removal of adjacent materials. The protective layers are subsequently removed after serving their protective function.
Solution Approach 2:
The protective layers are applied in advance before the dummy gate removal process to preemptively prevent damage to surrounding structures. This preliminary protective action ensures that when etching is performed to remove the oxide dummy gate material, the surrounding dielectric structures are already protected and cannot be accidentally removed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures complete removal of the dummy gate material, reducing the risk of device defects and improving the robustness of the finFET fabrication process by using materials that can be easily removed without affecting the surrounding structures, thus enhancing the reliability of the semiconductor devices.
Implementation Method 1
the protective layer includes a material resistant to etching techniques designed to remove oxide
Implementation Method 2
forming an inter-gate region above the substrate and in contact with at least one of the pair of dielectric spacers, the inter-gate region including a gap fill layer on top of a dielectric liner
Data Source
AI summary
A method including forming a dummy gate on a substrate, wherein the dummy gate includes an oxide, forming a pair of dielectric spacers on opposite sides of the dummy gate, and forming an inter-gate region above the substrate and in contact with at least one of the pair of dielectric spacers, the inter-gate region comprising a protective layer on top of a first oxide layer, wherein the protective layer comprises a material resistant to etching techniques designed to remove oxide. The method may further include removing the dummy gate to leave an opening, and forming a gate within the opening.