Oxide Display Gate Driver Circuitry for Leakage and Threshold Control
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Solution Overview
Problem
Designing gate driver circuitry for OLED displays with semiconducting oxide transistors is challenging due to issues with leakage and threshold voltage variability, which can lead to reliability and power consumption problems.
Innovation Solution
Implementing semiconducting oxide transistors with separately controllable bottom gates to adjust threshold voltage and reduce leakage, using configurations such as shorting the bottom gate terminal to the source or ground power supply lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional gate driver circuitry is used with semiconducting oxide transistors, then the display can operate, but leakage and threshold voltage variability cause reliability and power consumption problems
Solution Approach 1:
The patent applies parameter changes by adjusting the threshold voltage of semiconducting oxide transistors through controlled deposition conditions (oxygen partial pressure, deposition rate) to optimize the balance between leakage reduction and power consumption. By modifying the physical and chemical parameters of the transistor fabrication process, the circuit achieves improved reliability without excessive power loss.
2Loss of energy
If threshold voltage is adjusted to reduce leakage, then power consumption decreases, but threshold voltage variability increases
Solution Approach 1:
The patent implements feedback mechanisms through self-aligned electrode structures and controlled deposition processes that automatically compensate for threshold voltage variations. The fabrication method uses real-time monitoring and adjustment of deposition parameters to maintain consistent threshold voltage across transistors, reducing variability while achieving low leakage performance.
Solution Approach 2:
The patent applies preliminary action by pre-configuring the transistor structures with specific electrode arrangements and deposition conditions before final assembly. The self-aligned electrodes and pre-controlled deposition parameters establish stable threshold voltage characteristics in advance, preventing variability issues before they manifest in the final circuit operation.
3Adaptability or versatility
If bottom gate terminals are separately controllable, then threshold voltage adjustment is possible, but device complexity increases
Solution Approach 1:
The patent merges the bottom gate terminal control with the existing circuit architecture by integrating the threshold voltage adjustment function into the standard transistor operation. The self-aligned electrode structures combine multiple functions (gate control, alignment reference, electrical connection) into unified components, reducing overall device complexity while maintaining threshold voltage tunability.
Solution Approach 2:
The patent applies universality by designing bottom gate terminals that serve multiple purposes: threshold voltage adjustment, circuit timing control, and compensation for process variations. The same structural elements perform both mechanical alignment and electrical control functions, eliminating the need for separate components and reducing overall device complexity.
4Manufacturing precision
If self-aligned electrodes are used, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-forming self-aligned electrode structures during the deposition process itself, rather than requiring subsequent alignment steps. The electrodes are deposited in a controlled sequence that automatically positions them relative to each other, achieving high manufacturing precision while simplifying the overall fabrication process by eliminating complex alignment procedures.
Solution Approach 2:
The patent implements self-service through self-aligned electrode structures that automatically position themselves during deposition without external intervention. The deposition process inherently creates the correct geometric relationships between electrodes, allowing the structure to self-organize and eliminate the need for complex external alignment equipment or procedures.
Data Source
AI summary
A driver circuit configured to output a control signal to a row of display pixels is provided. The driver circuit can include a first transistor having a drain terminal coupled to a first positive power supply line, a gate terminal, and a source terminal that is coupled to an output port of the driver circuit on which the control signal is generated and a second transistor having a drain terminal coupled to the output port of the driver circuit, a gate terminal, and a source terminal that is coupled to a first ground power supply line. The first and second transistors can be coupled to a plurality of transistors coupled between a second positive power supply line and a second ground power supply line, configured to receive one or more clocks signals, and at least some of which include bottom gate terminals.