Oxide Semiconductor Gate Structure With UV-Blocking Insulating Layer
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Solution Overview
Problem
Current semiconductor devices using metal oxide semiconductor layers face challenges in achieving stable and reliable electrical characteristics due to exposure to ultraviolet light during the deposition of conductive films, which can lead to oxygen vacancies and adverse effects on transistor performance.
Innovation Solution
A semiconductor device structure is implemented with a specific configuration of insulating layers, where a second insulating layer with low transmittance of ultraviolet light is used to cover the first insulating layer and gate insulating layer, reducing the amount of ultraviolet light reaching the channel formation region, and a conductive layer is electrically connected to the semiconductor layer through a second opening in the second insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor device structure is used without additional insulating layers, then the device structure is simple and manufacturing is easier, but ultraviolet light during conductive film deposition reaches the channel formation region causing oxygen vacancies and poor electrical characteristics
Solution Approach 1:
The patent introduces a second insulating layer as an intermediary substance between the first insulating layer and the external environment. This second insulating layer specifically blocks ultraviolet light from reaching the channel formation region during conductive film deposition, while allowing the device to maintain its functional performance. The intermediary layer thus protects the semiconductor channel from harmful UV exposure without disrupting the overall device operation.
Solution Approach 2:
The patent divides the insulating structure into multiple segments: a first insulating layer in contact with the gate electrode and a second insulating layer covering the first insulating layer. Each layer serves a specific function - the first layer provides basic insulation while the second layer specifically blocks ultraviolet light. This segmentation allows the device to address multiple requirements (electrical insulation and UV protection) through specialized layers rather than requiring a single complex layer.
2Reliability
If the second insulating layer is made with higher ultraviolet light blocking capability, then oxygen vacancies are reduced and electrical characteristics improve, but the layer becomes more complex and harder to manufacture
Solution Approach 1:
The patent specifies particular parameter ranges for the second insulating layer to optimize both UV blocking performance and manufacturability. The thickness is controlled within 50-500 nm, and the ultraviolet light transmittance is limited to 1-70%. By defining these specific parameter ranges, the patent ensures sufficient UV protection while maintaining compatibility with existing manufacturing processes and materials.
Solution Approach 2:
The patent employs composite material structures where the second insulating layer can be formed from various material combinations including organic materials, inorganic materials, or their composites. This flexibility allows selection of materials that provide effective UV blocking while being compatible with standard semiconductor manufacturing techniques such as sputtering, CVD, or spin coating.
3Reliability
If the second insulating layer completely blocks ultraviolet light, then oxygen vacancies are minimized and device reliability is maximized, but manufacturing precision requirements increase due to the need for precise opening alignment
Solution Approach 1:
The patent deliberately allows the second insulating layer to have partial UV transmission (1-70% transmittance) rather than complete blocking. This partial action approach provides sufficient UV protection to reduce oxygen vacancies and improve electrical characteristics, while avoiding the need for perfectly aligned openings. The relaxed requirement accepts some UV transmission as tolerable, thereby reducing manufacturing precision demands.
Solution Approach 2:
The patent controls the thickness of the second insulating layer within a specific range (50-500 nm) to balance UV blocking performance with manufacturing feasibility. This parameter optimization ensures that the layer provides adequate protection without requiring extremely precise fabrication, as the thickness itself becomes a controllable parameter that achieves the desired UV attenuation without demanding perfect alignment precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the electrical characteristics and reliability of the semiconductor device by minimizing the impact of ultraviolet light, thereby reducing oxygen vacancies and improving transistor performance.
Implementation Method 1
The second insulating layer contains an organic material and includes a second opening inside the first opening. The second insulating layer is in contact with a top surface and a side surface of the first insulating layer and a side surface of the gate insulating layer... The transmittance of the second insulating layer in a wavelength range of greater than or equal to 200 nm and less than or equal to 350 nm is preferably higher than or equal to 0.01% and lower than or equal to 70%
Data Source
AI summary
A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a gate insulating layer, agate electrode, a first insulating layer, a second insulating layer, and a conductive layer. The gate insulating layer is in contact with a top surface and a side surface of the semiconductor layer, and the gate electrode includes a region overlapping with the semiconductor layer with the gate insulating layer therebetween. The first insulating layer contains an inorganic material and is in contact with a top surface of the gate insulating layer and a top surface and a side surface of the gate electrode. The gate insulating layer and the first insulating layer include a first opening in a region overlapping with the semiconductor layer. The second insulating layer contains an organic material and includes a second opening inside the first opening. The second insulating layer is in contact with a top surface and a side surface of the first insulating layer and a side surface of the gate insulating layer. The conductive layer is electrically connected to the semiconductor layer through the second opening.