Corundum Oxide Semiconductor Laminate for Stress-Managed Epitaxy

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Solution Overview

Problem

Existing semiconductor devices using gallium oxide face issues with crystal defects, warpage, and cracks due to lattice mismatch and thermal expansion coefficient differences, particularly when forming films on large-area substrates, which complicates production.

Innovation Solution

A semiconductor laminate structure comprising a base, a buffer layer with multiple buffer films of varying compositions, and a crystalline metal oxide semiconductor film with a corundum structure, where the buffer films are 200-650 nm thick, mitigating stress and reducing defects and warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If heteroepitaxial growth is performed on large-area bases, then production area increases, but crystal defects, warpage, and cracks increase due to stress from lattice mismatch and thermal expansion coefficient differences

Engineering Contradiction:
Improvesubstrate areaVSAvoidfilm quality
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The buffer layer is divided into multiple buffer films with different compositions (e.g., GaAlO3, AlInO3, GaInO3 with varying ratios) stacked in sequence. Each buffer film has a specific thickness range (200-650 nm) and composition designed to progressively manage stress, allowing the overall structure to accommodate large substrate areas while maintaining film quality through compositional gradient stress distribution.

Inventive Principle:
Principle #1Segmentation

2Reliability

If buffer layer thickness is increased to reduce stress, then stress mitigation improves, but film formation time and process complexity increase

Engineering Contradiction:
Improvestress mitigationVSAvoidfilm formation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent optimizes the thickness parameter of each buffer film to be within 200-650 nm, and adjusts compositional parameters (metal element ratios) across different buffer films. This parameter optimization achieves effective stress mitigation while controlling total buffer layer thickness and formation time, balancing reliability improvement with time efficiency.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If multiple buffer films with different compositions are used, then stress distribution improves, but manufacturing process complexity increases

Engineering Contradiction:
Improvestress distributionVSAvoidbuffer layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Different buffer films are designed with specific local compositions (e.g., GaAlO3 with certain Al/Ga ratios, AlInO3 with specific In/Al ratios) tailored to their positions in the stack. Each buffer film's composition is locally optimized for its specific function in the stress distribution sequence, achieving superior stress management while maintaining a systematic manufacturing approach.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The laminate structure produces high-quality semiconductor films with reduced crystal defects, warpage, and cracks, enabling the manufacturing of high-performance semiconductor devices.

Implementation Method 1

stress due to a lattice mismatch between the base and the crystalline metal oxide semiconductor film can be effectively mitigated

Methodology Applied
Scientific EffectStress mitigation:

Implementation Method 2

crystal defects, such as dislocations, and warpage and cracks occur due to stress caused by a lattice mismatch or a difference in thermal expansion coefficient between the base and the epitaxial layer

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS12593625B2Semiconductor laminate, semiconductor device, and method for manufacturing semiconductor device
Publication Date: 2026.03.31 SHIN ETSU CHEMICAL CO LTD
  • US12593625B2 patent drawing
  • US12593625B2 patent drawing
  • US12593625B2 patent drawing

AI summary

A semiconductor laminate at least including: a base; a buffer layer; and a crystalline metal oxide semiconductor film containing at least one metal element and having a corundum structure, the semiconductor laminate having the buffer layer on a main surface of the base directly or via another layer, the semiconductor laminate having the crystalline metal oxide semiconductor film on the buffer layer. The buffer layer is a laminate structure of a plurality of buffer films each with a different composition, and at least two buffer films of the plurality of buffer films have a film thickness of 200 nm or more and 650 nm or less.