Oxide Semiconductor Layer Growth for Stable High-Mobility TFTs

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Solution Overview

Problem

Existing oxide semiconductor materials, such as those based on InGaO3(ZnO)m, do not achieve adequate characteristics despite their potential for high-performance semiconductor devices, particularly in large-area display applications requiring high-speed operation and low impurity resistance.

Innovation Solution

A semiconductor device is developed using a purified oxide semiconductor layer with a crystalline region, where the second oxide semiconductor layer is grown from the crystalline region of a first oxide semiconductor layer, and both layers have c-axis alignment perpendicular to the surface, reducing impurity entry and enhancing crystallinity, thereby improving electrical anisotropy and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If amorphous silicon is used for large-area display devices, then large area can be satisfied, but high-speed operation performance is insufficient

Engineering Contradiction:
Improvedisplay device areaVSAvoidoperation speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The patent changes the material parameter from amorphous silicon to oxide semiconductor (In-Ga-Zn-O), which fundamentally alters the electrical characteristics and enables high-speed operation while maintaining large-area compatibility through low-temperature processing

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite structure combining oxide semiconductor layer with specific metal layers (Al, Ti, Mo) to achieve both large-area fabrication compatibility and high-speed switching performance through synergistic material properties

Inventive Principle:
Principle #40Composite materials

2Reliability

If oxide semiconductor materials are used to improve electrical characteristics, then field-effect mobility increases, but impurity resistance and threshold voltage shift occur

Engineering Contradiction:
Improveelectrical characteristics stabilityVSAvoidimpurity entry and threshold voltage shift
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs inert atmosphere (nitrogen or rare gas) during sputtering deposition and heat treatment processes to prevent oxygen deficiency and impurity incorporation in the oxide semiconductor layer, thereby reducing threshold voltage shift and improving electrical stability

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

Solution Approach 2:

The patent performs preliminary oxygen plasma treatment and oxygen introduction heat treatment before final device operation to pre-saturate oxygen vacancies and prevent future impurity entry, stabilizing threshold voltage and reducing carrier concentration drift

Inventive Principle:
Principle #10Preliminary action

3Reliability

If crystalline structure is formed to improve electrical anisotropy, then field-effect mobility increases, but manufacturing complexity increases

Engineering Contradiction:
Improvefield-effect mobilityVSAvoidcrystallization process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the deposition parameters (substrate temperature, oxygen partial pressure, sputtering power) to enable formation of oxide semiconductor layers with desired crystalline structure (c-axis alignment) directly during deposition, avoiding complex post-deposition crystallization processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach results in a semiconductor device with reduced threshold voltage shift, improved temperature stability of electric characteristics, and increased field-effect mobility, enabling high-reliability and high-performance operation across various temperature ranges.

Implementation Method 1

a first oxide semiconductor layer including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside

Methodology Applied
Scientific EffectCrystal growth: Crystallisation

Implementation Method 2

a second oxide semiconductor layer over the first oxide semiconductor layer, wherein the second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20240421231A1Semiconductor device and manufacturing method thereof
Publication Date: 2024.12.19 SEMICON ENERGY LAB CO LTD
  • US20240421231A1 patent drawing
  • US20240421231A1 patent drawing
  • US20240421231A1 patent drawing

AI summary

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.