Semiconductor Oxide Layer Planarization for Photonic Devices

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Solution Overview

Problem

Current 3-D integration methods for semiconductor structures, particularly for photonic applications, face challenges in achieving the strict thickness uniformity required for the planarizing oxide layer covering silicon nitride patterned layers, which affects the optical coupling between active silicon devices.

Innovation Solution

A method involving the planarization of a conformal oxide layer followed by the selective chemical-mechanical removal of the oxide on top of silicon nitride patterns, resulting in a dished patterned layer, and subsequent re-deposition of a thin oxide layer to improve surface planarity and uniformity, using ceria-based slurries for selective CMP to enhance oxide to nitride selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conformal oxide layer is deposited to cover the silicon nitride patterned layer, then the oxide layer provides planarization and bonding surface, but the thickness uniformity of the oxide layer becomes difficult to control

Engineering Contradiction:
Improvethickness uniformity of oxide layerVSAvoidcomplexity of planarization process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the single conformal oxide layer into two separate layers: a first conformal oxide layer deposited to a greater thickness, and a second conformal oxide layer deposited to a lesser thickness. This segmentation allows each layer to be optimized independently - the first layer provides bulk planarization while the second layer achieves the required thickness uniformity for bonding, thereby resolving the contradiction between planarization effectiveness and thickness control precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first conformal oxide layer is deposited in advance with a greater thickness to establish the foundational planarization and provide a uniform base. This preliminary action allows the subsequent second conformal oxide layer to be deposited with precise thickness control, as the underlying first layer already provides the necessary planarity and thickness buffer, thus improving the final thickness uniformity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the oxide layer thickness is reduced to below 300 nm for photonic applications, then the optical coupling performance improves, but the thickness uniformity becomes harder to maintain

Engineering Contradiction:
Improveoptical coupling performanceVSAvoidthickness uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

By segmenting the oxide layer into two layers with different thicknesses, the patent enables the total thickness to be controlled within the optimal range for optical coupling (below 300 nm) while maintaining manufacturing precision. The first layer provides the majority of the thickness with relaxed uniformity requirements, and the second layer fine-tunes the total thickness to achieve both optical performance and uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the deposition parameters between the two conformal oxide layers - the first layer is deposited with parameters optimized for thickness and planarity, while the second layer is deposited with parameters optimized for precise thickness control and uniformity. This parameter optimization for each layer enables achieving both thin total thickness and high uniformity.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If CMP planarization is used to achieve uniform oxide thickness, then the thickness uniformity improves, but the process complexity and difficulty in meeting strict requirements increases

Engineering Contradiction:
Improvethickness uniformity of oxide layerVSAvoidease of planarization process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent extracts the planarization function from the final bonding interface by having the first conformal oxide layer perform the bulk planarization task. This allows the second conformal oxide layer to focus solely on achieving precise thickness uniformity without the complexity of CMP processing, thereby simplifying the overall manufacturing process while maintaining high precision.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical CMP planarization process with a deposition-based approach using two conformal oxide layers. Instead of using mechanical polishing to achieve uniformity, the patent uses controlled deposition processes that inherently provide better thickness uniformity, thereby eliminating the complexity and difficulty associated with CMP process control.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures improved thickness uniformity and planarity of the oxide layer, enhancing the bonding process and resulting in photonic devices with improved properties and performance.

Implementation Method 1

selective chemical-mechanical removal of the oxide on top of silicon nitride patterns

Methodology Applied
Scientific EffectChemical-mechanical polishing:

Implementation Method 2

using ceria-based slurries for selective CMP to enhance oxide to nitride selectivity

Methodology Applied
Scientific EffectOxide to nitride selectivity:

Implementation Method 3

providing a first layer of a conformal oxide on the silicon nitride patterned layer

Methodology Applied
Scientific EffectConformal deposition: Deposition (physical)

Data Source

PatentEP3494425B1Method for manufacturing a semiconductor structure
Publication Date: 2022.02.16 SOITEC SA
  • EP3494425B1 patent drawingFigure 1(A)~1(E)
  • EP3494425B1 patent drawingFigure 2~3
  • EP3494425B1 patent drawingFigure 4(A)~4(B)

AI summary

The present invention relates to a method for manufacturing a semiconductor structure and to a photonic device, wherein the method comprising the steps of: providing a silicon nitride patterned layer (102) over a carrier substrate (101); providing a first layer of a conformal oxide (103) on the silicon nitride patterned layer (102) such that it fully covers said silicon nitride patterned layer; and planarizing the first layer of conformal oxide (103) to a predetermined thickness above the silicon nitride patterned layer (102) to form a planarizing oxide layer (103'). After the step of planarizing the first layer of conformal oxide (103), the method further comprises steps of clearing the silicon nitride patterned layer (102) to form a dished silicon nitride patterned layer (102 ) with a dishing height; and, subsequently, providing a second layer of a conformal oxide (104) on or over the dished silicon nitride layer (102').