Oxide Semiconductor Memory Transistor Barrier Contacts for Heat Stability

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Solution Overview

Problem

Oxide semiconductor transistors used in memory cells face significant threshold voltage fluctuations due to oxygen release during heat treatment, leading to instability and reduced performance.

Innovation Solution

Incorporating a barrier layer and a contact layer with specific metal and oxygen/nitrogen compositions between the oxide semiconductor layer and electrodes to prevent oxygen diffusion, thereby stabilizing the threshold voltage and enhancing heat resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If oxide semiconductor transistor undergoes heat treatment during memory cell and wiring formation, then memory cell and wiring are formed, but threshold voltage fluctuates due to oxygen release

Engineering Contradiction:
Improvememory cell and wiring formationVSAvoidthreshold voltage stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A barrier layer is introduced as an intermediary between the oxide semiconductor layer and the electrode, preventing oxygen diffusion from the electrode to the oxide semiconductor layer during heat treatment. This mediator layer resolves the contradiction by allowing heat treatment to proceed for manufacturing while blocking the harmful oxygen release that causes threshold voltage fluctuation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The oxide semiconductor transistor structure is enhanced by combining the oxide semiconductor layer with a barrier layer having specific compositional characteristics (high oxygen affinity elements). This composite structure maintains the electrical functionality of the oxide semiconductor while adding oxygen-blocking capability, thus achieving both manufacturability through heat treatment and threshold voltage stability.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If heat treatment is applied to oxide semiconductor transistor, then memory cell structure is formed, but oxygen is released from oxide semiconductor layer

Engineering Contradiction:
Improvememory cell structure formationVSAvoidoxygen release from oxide semiconductor layer
Core Design Contradiction:
Ease of manufactureVSLoss of substance

Solution Approach 1:

The barrier layer serves as an intermediary that traps oxygen during heat treatment, preventing it from being released from the oxide semiconductor layer. This allows the necessary heat treatment for memory cell structure formation to proceed while the barrier layer absorbs and retains the oxygen that would otherwise be lost from the oxide semiconductor layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier layer creates an oxygen-rich local environment adjacent to the oxide semiconductor layer during heat treatment, effectively acting as an inert barrier that prevents oxygen loss. By positioning elements with high oxygen affinity in the barrier layer, an oxygen-retaining environment is maintained at the interface with the oxide semiconductor layer.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces threshold voltage fluctuations and improves the heat resistance of oxide semiconductor transistors, maintaining performance stability even after high-temperature treatments.

Implementation Method 1

a barrier layer provided between the oxide semiconductor layer and the electrode

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

the oxide semiconductor transistor undergoes heat treatment accompanying the formation of the memory cell and wiring

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS12089395B2Semiconductor device and semiconductor memory device
Publication Date: 2024.09.10 KIOXIA CORP
  • US12089395B2 patent drawing
  • US12089395B2 patent drawing
  • US12089395B2 patent drawing

AI summary

A semiconductor device of an embodiment is provided with: an oxide semiconductor layer including a first region, a second region, and a third region between the first region and the second region; a gate electrode; a gate insulating layer; a first electrode electrically connected to the first region; a second electrode electrically connected to the second region; a first conductive layer provided at least one of positions between the first region and the first electrode or between the second region and the second electrode and containing a first metal element and at least one element of oxygen (O) or nitrogen (N); and a second conductive layer provided between the oxide semiconductor layer and the first conductive layer and containing oxygen (O) and at least one element selected from indium (In), zinc (Zn), tin (Sn), or cadmium (Cd). The second conductive layer is thicker than the first conductive layer.