3D Oxide Semiconductor Memory Cell Structure for High-Capacity Reliability
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Solution Overview
Problem
Existing memory devices face challenges in achieving high reliability and large memory capacity while maintaining miniaturization and low power consumption, particularly in the context of increasing data handling demands in electronic devices.
Innovation Solution
A semiconductor device is designed with a specific configuration that includes conductors and insulators arranged concentrically around conductors, utilizing oxide semiconductors for memory cells, which function as transistors for data writing and capacitors for data reading, enabling a NAND memory device structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory capacity is increased to handle larger data amounts, then storage capability is improved, but device size increases
Solution Approach 1:
The patent transitions from planar 2D memory cell arrangements to three-dimensional stacked structures, where memory cells are arranged in multiple layers vertically. This dimensional change allows significant increase in memory capacity without proportionally increasing the footprint area of the device, effectively resolving the contradiction between storage capability and device size.
Solution Approach 2:
The patent implements nested structures where conductors and insulators are arranged concentrically around central conductors, with multiple functional layers embedded within each other. This nesting approach maximizes the use of available space, allowing more memory cells to be packed into a compact volume, thereby increasing capacity without proportional size increase.
2Volume of moving object
If miniaturization is pursued to reduce device size, then compactness is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the memory device into multiple discrete stacked layers, each containing specific functional elements (conductors, insulators, semiconductor regions). This segmentation allows each layer to be manufactured and controlled independently, reducing the cumulative precision requirements compared to manufacturing a monolithic miniaturized structure, while still achieving compact overall dimensions.
3Reliability
If oxide semiconductors are used in channel formation regions, then memory reliability is improved, but device complexity increases
Solution Approach 1:
The patent designs the oxide semiconductor-based memory cells to serve multiple functions: they act as both storage elements and transistors for data writing operations. This multi-functionality reduces the need for separate dedicated components, thereby improving reliability through better material properties while mitigating the increase in device complexity through functional integration.
Data Source
AI summary
A novel semiconductor device is provided. A component extending in a first direction, and a first conductor and a second conductor extending in a second direction are provided. The component includes a third conductor, a first insulator, a first semiconductor, and a second insulator. In a first intersection portion of the component and the first conductor, the first insulator, the first semiconductor, the second insulator, a second semiconductor, and a third insulator are provided concentrically. In a second intersection portion of the component and the second conductor, the first insulator, the first semiconductor, the second insulator, a fourth conductor, and a fourth insulator are provided concentrically around the third conductor.