Oxide-Isolated Memory Decks for Charge Trapping Control

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Solution Overview

Problem

As memory cell feature sizes decrease, the thickness of tunnel dielectric materials also decreases, increasing the risk of failure and charge leakage, and conventional vertical memory arrays face challenges with charge trapping and reduced operating windows due to silicon nitride materials between decks.

Innovation Solution

Incorporating an oxide material, such as silicon dioxide, between the decks of alternating conductive and insulative materials to prevent charge trapping and improve electrical isolation, thereby enhancing device performance and increasing the operating window of memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the thickness of tunnel dielectric material is reduced to increase memory density, then memory cell capacity increases, but the reliability of the tunnel dielectric material decreases and charge leakage increases

Engineering Contradiction:
Improvememory densityVSAvoidtunnel dielectric material reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent employs a composite dielectric structure consisting of a thin tunnel dielectric layer (5-15 nm) combined with a charge trapping layer (such as silicon nitride or aluminum oxide) and a blocking dielectric layer. This composite structure allows the tunnel dielectric to be thinner for higher density while the additional layers provide reliability enhancement and charge management, preventing both leakage and premature failure.

Inventive Principle:
Principle #40Composite materials

2Quantity of substance

If silicon nitride material is used between decks to increase memory density, then memory cell capacity increases, but charge trapping occurs and the operating window decreases

Engineering Contradiction:
Improvememory densityVSAvoidcharge trapping
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent removes silicon nitride from the inter-deck regions and replaces it with oxide materials such as silicon dioxide or aluminum oxide. This extraction of the problematic material eliminates the charge trapping issue while maintaining the structural function of isolating adjacent decks, thereby preserving the operating window despite increased memory density.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If vertical memory array architecture is used to increase memory density, then the number of memory cells per die area increases, but charge coupling between adjacent pillars increases and reduces the operating window

Engineering Contradiction:
Improvememory cell densityVSAvoidcharge coupling
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent introduces oxide materials as intermediary layers between adjacent vertical memory pillars and between decks. These oxide intermediaries provide electrical isolation that prevents charge coupling and interference between neighboring memory structures, enabling higher density vertical arrays to maintain adequate operating windows without charge-related degradation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The oxide material reduces charge coupling between adjacent pillars, improving string current and gate-induced drain leakage, resulting in enhanced memory cell performance with a larger operating window and reduced read-write bias.

Implementation Method 1

an oxide material between the adjacent decks, the oxide material extending between an uppermost level of a first deck and a lowermost level of a second deck adjacent to the first deck

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS20250261373A1Memory devices including oxide material between decks thereof
Publication Date: 2025.08.14 LODESTAR LICENSING GROUP LLC
  • US20250261373A1 patent drawing
  • US20250261373A1 patent drawing
  • US20250261373A1 patent drawing

AI summary

A microelectronic device includes decks comprising alternating levels of a conductive material and an insulative material, the decks comprising pillars including a channel material extending through the alternating levels of the conductive material and the insulative material, a conductive contact between adjacent decks and in electrical communication with the channel material of the adjacent decks, and an oxide material between the adjacent decks, the oxide material extending between an uppermost level of a first deck and a lowermost level of a second deck adjacent to the first deck. Related electronic systems and methods of forming the microelectronic device and electronic systems are also disclosed.