Oxide Semiconductor Memory Structure for Dense Low-Power Integration
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Solution Overview
Problem
Current semiconductor devices face challenges in miniaturization, high integration, high storage capacity, small variation in transistor characteristics, favorable reliability, and low power consumption.
Innovation Solution
A semiconductor device is designed with a specific structure including conductors, insulators, and oxide layers, where the oxide layers include indium, gallium, zinc, and other elements, and are processed to have different atomic ratios and crystallinity, allowing for efficient transistor operation and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor devices are miniaturized and highly integrated to increase storage capacity, then device density and storage capacity are improved, but manufacturing precision and control of transistor characteristics become more difficult
Solution Approach 1:
The patent applies parameter changes by precisely controlling the atomic ratios of elements (In, Ga, Zn) in the oxide semiconductor layers. By adjusting these compositional parameters and the thickness of each layer, the invention achieves consistent transistor characteristics across miniaturized devices, resolving the contradiction between high integration and manufacturing precision.
Solution Approach 2:
The invention uses composite oxide semiconductor materials with specific multi-layer structures (first oxide layer with In-Ga-Zn oxide and second oxide layer with In-Zn oxide). This composite material approach enables fine-tuning of electrical characteristics while maintaining manufacturing consistency, allowing high storage capacity with controlled transistor variation.
2Use of energy by moving object
If oxide semiconductor layers are used to reduce leakage current and power consumption, then power consumption is reduced, but manufacturing complexity increases due to multiple layers with different compositions
Solution Approach 1:
The patent applies local quality by creating oxide semiconductor layers with different compositions in different regions. The first oxide layer contains In-Ga-Zn oxide while the second oxide layer contains In-Zn oxide with different atomic ratios. This local compositional variation optimizes leakage current reduction while maintaining manageable manufacturing complexity through systematic composition control.
3Quantity of substance
If multiple conductors and insulators are stacked to achieve high integration, then device functionality and storage capacity are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent resolves the contradiction by transitioning to three-dimensional stacking of conductors and insulators. Multiple oxide layers (first and second oxide layers with different compositions) are stacked vertically, allowing high integration density while managing complexity through systematic layer design. The conductive layers are positioned at different heights and depths, creating a multi-dimensional architecture that increases storage capacity without proportionally increasing manufacturing difficulty.
Data Source
AI summary
A semiconductor device that can be miniaturized or highly integrated can be provided. The semiconductor device includes a first conductor positioned over a substrate; an oxide positioned in contact with atop surface of the first conductor; a second conductor, a third conductor, and a fourth conductor positioned over the oxide; a first insulator in which a first opening and a second opening are formed, the first insulator being positioned over the second conductor to the fourth conductor; a second insulator positioned in the first opening; a fifth conductor positioned over the second insulator; a third insulator positioned in the second opening; and a sixth conductor positioned over the third insulator. The third conductor is positioned to overlap with the first conductor. The first opening is formed to overlap with a region between the second conductor and the third conductor. The second opening is formed to overlap with a region between the third conductor and the fourth conductor.