Gate-All-Around Oxide Nanowire Stacks for Drive Current Modulation
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Solution Overview
Problem
The challenge in integrated circuit technology is to achieve different drive currents for various circuit types and control transistor leakage current in nanowire and nanoribbon architectures, which are not easily addressed by existing methods due to the stacked and self-aligned nature of these structures.
Innovation Solution
A self-aligned bottom-up oxidation process is employed to de-populate nanowire transistor channels and provide sub-fin isolation, allowing for modulation of drive currents by selectively oxidizing bottommost nanowires while minimizing oxidation of upper nanowires, using a thin film oxidation catalyst layer and mild oxidation conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional oxidation processes are used on nanowire stacks, then all nanowires are oxidized uniformly, but this prevents selective depopulation of bottommost nanowires and modulation of drive currents
Solution Approach 1:
The patent segments the oxidation process into two distinct stages: a first oxidation process that oxidizes all nanowires uniformly, and a second oxidation process that selectively oxidizes only the bottommost nanowires. This segmentation allows independent control of each oxidation stage, enabling selective depopulation while maintaining uniform oxidation where needed.
Solution Approach 2:
The first oxidation process is performed as a preliminary action before the second oxidation process. By pre-oxidizing all nanowires uniformly in the first stage, the patent creates a foundation that enables the selective oxidation in the second stage to affect only the bottommost nanowires, achieving both uniform and selective oxidation goals.
2Power
If all nanowires are kept active in vertical arrangements, then maximum drive current is achieved, but leakage current control and drive current modulation become difficult
Solution Approach 1:
The patent extracts or removes the functionality of the bottommost nanowires by selectively oxidizing them in the second oxidation process. This depopulation of specific nanowires allows control over the number of active channels, enabling leakage current reduction and drive current modulation while maintaining active nanowires for power generation.
Solution Approach 2:
The patent applies different functional qualities to different parts of the nanowire structure: bottommost nanowires are oxidized to create isolation regions with different electrical properties, while upper nanowires remain active for current conduction. This local differentiation enables both power generation and leakage control within the same structure.
3Manufacturing precision
If lithographic processes are used to pattern nanowire features, then feature dimensions can be controlled, but spacing between features and smallest dimension become constrained
Solution Approach 1:
The patent employs self-aligned processes where the nanowire positions are determined by the vertical stacking structure itself rather than requiring additional lithographic patterning steps. The self-aligned nature of the nanowire formation and the selective oxidation process eliminate the need for complex lithographic constraints, allowing greater design freedom.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of nanowire and nanoribbon-based CMOS architectures with variable numbers of active channels, improving drive current modulation and reducing leakage current, facilitating deeper scaling and robust functionality in nanowire technologies.
Implementation Method 1
using a thin film oxidation catalyst layer and mild oxidation conditions
Data Source
AI summary
Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approaches, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires. All nanowires of the vertical arrangement of nanowires are oxide nanowires. A gate stack is over the vertical arrangement of nanowires, around each of the oxide nanowires. The gate stack includes a conductive gate electrode.