Oxide Semiconductor Pixel Transistors for Low-Parasitic LCD Signal Lines
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Solution Overview
Problem
Conventional liquid crystal display devices face challenges with parasitic capacitance, which limits the high-speed operation of signal lines and reduces the aperture ratio and resolution, especially at higher pixel densities.
Innovation Solution
The use of an oxide semiconductor layer with extremely low carrier density in transistors eliminates the need for a capacitor in each pixel, reducing parasitic capacitance and allowing for higher driving frequencies by eliminating capacitor wiring, thereby improving the aperture ratio and enabling higher resolution displays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a capacitor is provided in each pixel to hold voltage, then the voltage holding function is improved, but the aperture ratio is reduced due to the area occupied by the capacitor and capacitor wiring
Solution Approach 1:
The invention extracts and eliminates the capacitor component from the pixel structure by utilizing the liquid crystal element's inherent storage capacitance. The pixel electrode serves dual functions as both the driving electrode and the capacitor electrode, removing the need for separate capacitor structures and capacitor wiring, thereby resolving the contradiction between voltage holding function and aperture ratio.
2Reliability
If capacitor wiring is provided to connect the capacitor, then the voltage holding function is improved, but parasitic capacitance increases which limits high-speed operation
Solution Approach 1:
The invention extracts and eliminates the capacitor wiring from the pixel structure. By using the liquid crystal element's inherent storage capacitance and sharing the pixel electrode as the capacitor electrode, separate capacitor wiring is made unnecessary. This removal of capacitor wiring directly reduces parasitic capacitance and enables high-speed operation while maintaining voltage holding function.
3Area of stationary object
If the signal line is made longer to reach distant pixels, then the coverage area is improved, but data signal delay increases due to parasitic capacitance
Solution Approach 1:
The invention converts the harmful effect of parasitic capacitance into a beneficial outcome by eliminating the capacitor wiring that contributes to it. By removing the capacitor wiring and reducing parasitic capacitance at each pixel, the signal line can maintain lower total parasitic capacitance even over longer distances, thereby reducing data signal delay while preserving coverage area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the aperture ratio and allows for higher driving frequencies, reducing data signal delay and improving display quality, especially in high-definition and large-sized liquid crystal display devices.
Implementation Method 1
an oxide semiconductor layer with extremely low carrier density
Implementation Method 2
a certain amount of charge can be held without intentionally providing the capacitor 1006 because the liquid crystal element itself has storage capacitance
Data Source
AI summary
An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.