Semiconductor Oxide Planarization for Photonic Device Uniformity

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Solution Overview

Problem

Current 3-D integration methods for semiconductor structures, particularly for photonic applications, face challenges in achieving the strict thickness uniformity requirements of the planarizing oxide layer covering silicon nitride patterned layers, which affects the optical coupling between active silicon devices.

Innovation Solution

A method involving the planarization of a conformal oxide layer followed by the selective chemical-mechanical removal of the oxide on top of silicon nitride patterns, resulting in a dished patterned layer, and subsequent re-deposition of a thin oxide layer to improve surface planarity and uniformity, using ceria-based slurries for selective CMP to enhance oxide to nitride selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conformal oxide layer is deposited to cover the silicon nitride patterned layer, then the oxide layer thickness must be increased to ensure complete coverage, but this results in excessive thickness and poor uniformity above the patterns

Engineering Contradiction:
Improveoxide layer thickness uniformityVSAvoidoxide layer thickness
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The oxide layer is divided into two distinct layers: a first conformal oxide layer deposited to cover the silicon nitride patterns, and a second planarizing oxide layer deposited thereafter to achieve the required thickness and uniformity. This segmentation allows each layer to fulfill different functional requirements without compromise

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first conformal oxide layer is deposited in advance to provide complete coverage of the silicon nitride patterns and establish a foundation for subsequent planarization. This preliminary action ensures that the patterns are protected and covered before the final thickness and uniformity requirements are met by the second layer

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If CMP planarization is used to reduce oxide layer thickness to below 200 nm, then the thickness uniformity requirement can be met, but the process becomes extremely difficult to control and stops must be precisely timed

Engineering Contradiction:
Improveoxide layer thickness uniformityVSAvoidplanarization process control
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of using CMP to precisely stop at the target thickness, the method deposits an excessive amount of oxide (first conformal layer plus second planarizing layer totaling more than the minimum required thickness) and then removes the excess through selective clearing. This approach trades precise stopping control for easier, more robust process control

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The excess oxide material is selectively removed through clearing processes that target only the oxide layers, leaving the silicon nitride patterns intact. This extraction of excess material achieves the final thickness requirement without the complexity of precise CMP stopping control

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures improved thickness uniformity and planarity of the oxide layer, leading to enhanced bonding and layer transfer quality, resulting in photonic devices with improved properties and performance.

Implementation Method 1

selective chemical-mechanical removal of the oxide on top of silicon nitride patterns

Methodology Applied
Scientific EffectChemical-mechanical polishing (CMP):

Implementation Method 2

using ceria-based slurries for selective CMP to enhance oxide to nitride selectivity

Methodology Applied
Scientific EffectOxide to nitride selectivity:

Implementation Method 3

planarizing the first layer of conformal oxide to a predetermined thickness above the silicon nitride patterned layer

Methodology Applied
Scientific EffectChemical-mechanical polishing (CMP):

Implementation Method 4

subsequent re-deposition of a thin oxide layer to improve surface planarity and uniformity

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS20230129131A1Method for manufacturing a semiconductor structure
Publication Date: 2023.04.27 SOITEC SA
  • US20230129131A1 patent drawing
  • US20230129131A1 patent drawing
  • US20230129131A1 patent drawing

AI summary

A method for manufacturing a semiconductor structure or a photonic device, wherein the method comprises the steps of: providing a silicon nitride patterned layer over a carrier substrate; providing a first layer of a conformal oxide on the silicon nitride patterned layer such that it fully covers the silicon nitride patterned layer; and planarizing the first layer of conformal oxide to a predetermined thickness above the silicon nitride patterned layer to form a planarizing oxide layer. After the step of planarizing the first layer of conformal oxide, the method further comprises steps of clearing the silicon nitride patterned layer to form a dished silicon nitride patterned layer with a dishing height; and subsequently providing a second layer of a conformal oxide on or over the dished silicon nitride layer.