Semiconductor Oxide Planarization With Polish Stop Layer Control
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Solution Overview
Problem
Conventional polishing processes for oxide layers in semiconductor manufacturing result in non-uniform surfaces, requiring manual adjustments to the etch process due to unstable wafer thickness and thickness uniformity issues.
Innovation Solution
A method involving the use of a polish stop layer and a buffer layer, combined with a chemical mechanical planarization process, slurry, surfactant, and end-point detection, to precisely control the polishing and etching of oxide layers, ensuring uniformity and reducing the need for manual adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional polishing processes are used on oxide layers, then the polishing process is simple, but the surface uniformity is insufficient and wafer thickness stability is poor
Solution Approach 1:
The polishing process is segmented into multiple stages: first polishing the buffer layer to a target thickness, then continuing to polish until the polish stop layer is exposed. This segmentation allows each stage to have specific control objectives, improving overall surface uniformity while maintaining manageable process complexity.
Solution Approach 2:
A polish stop layer is introduced as an intermediary layer between the oxide layer and the buffer layer. This stop layer serves as a visual and tactile indicator during polishing, enabling precise control of the polishing endpoint and ensuring uniform buffer layer thickness without requiring complex real-time measurement systems.
2Manufacturing precision
If manual adjustments to etch process are made, then etch process can be adapted to thickness variations, but productivity decreases and time is lost
Solution Approach 1:
The buffer layer thickness is predetermined and controlled during the polishing stage by polishing to a target thickness and exposing the polish stop layer. This preliminary control of thickness eliminates the need for manual adjustments during the subsequent etch process, maintaining etch process control while significantly improving productivity.
Solution Approach 2:
The polishing process is designed to be self-regulating through the use of the polish stop layer. When the buffer layer is polished down to the target thickness, the polish stop layer becomes exposed, automatically signaling the endpoint without requiring operator intervention or complex monitoring systems.
3Productivity
If buffer layer thickness is not controlled uniformly, then polishing process is simpler, but etch process requires manual adjustment
Solution Approach 1:
The polish stop layer provides visual and tactile feedback during the polishing process. As polishing progresses, the transition from polishing the buffer layer to exposing the polish stop layer provides clear feedback on the polishing endpoint, enabling automatic process control and consistent buffer layer thickness without requiring manual intervention.
Solution Approach 2:
The polishing process utilizes changes in material properties and friction characteristics when transitioning from polishing the buffer layer to exposing the polish stop layer. This parameter change provides a natural endpoint detection mechanism that ensures uniform thickness control while enabling automated process operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves within-wafer and wafer-to-wafer uniformity of semiconductor structures, allowing for precise control of the etch process without requiring manual adjustments, thereby enhancing the overall manufacturing precision.
Implementation Method 1
polishing the buffer layer such that at least a portion of the buffer layer is removed and the polish stop layer is exposed
Data Source
AI summary
A method of forming a semiconductor structure includes forming a photoresist pattern on an anti-reflective layer on a wafer; forming an oxide layer on the anti-reflective layer and the photoresist pattern, wherein the oxide layer has a protruding portion overlapping the photoresist pattern; forming a polish stop layer along a top surface of the oxide layer; forming a buffer layer on the polish stop layer; polishing the buffer layer such that at least a portion of the buffer layer is removed and the polish stop layer is exposed; and etching the buffer layer, the polish stop layer and the oxide layer such that the photoresist pattern is exposed.


