Oxide Semiconductor Device Active Pattern Protection
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Solution Overview
Problem
Conventional oxide semiconductor transistors with a bottom-gate structure face damage to the active pattern during the formation of source and drain electrodes, leading to deteriorated electrical characteristics such as increased threshold voltage distribution and reduced mobility.
Innovation Solution
A method of manufacturing an oxide semiconductor device where a first mask pattern, an insulating interlayer, and a second mask pattern are sequentially formed on the active pattern, ensuring it is entirely covered to prevent exposure and subsequent damage during the formation of source and drain electrodes, thereby maintaining carrier concentration and enhancing electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide semiconductor is employed in a transistor having a bottom-gate structure, then high mobility and uniform threshold voltage are achieved, but the active pattern may be damaged while subsequently forming the source electrode and the drain electrode
Solution Approach 1:
The patent applies preliminary action by forming a protective mask pattern on the active pattern before forming the source and drain electrodes. This mask pattern is created in advance to prevent damage during subsequent processing steps, specifically during the formation of electrodes through sputtering or other deposition processes that could otherwise contaminate or damage the oxide semiconductor active pattern.
Solution Approach 2:
The mask pattern serves as an intermediary protective layer between the source/drain electrode formation process and the active pattern. This intermediary structure prevents direct contact between potentially harmful processing conditions (such as sputtering plasma or deposited materials) and the sensitive oxide semiconductor, thereby protecting the active pattern while allowing the electrodes to be formed in the required positions.
2Ease of manufacture
If amorphous silicon is used in the active pattern, then manufacturing is simpler, but the transistor has relatively low mobility and cannot operate at high speed
Solution Approach 1:
The patent changes the material parameter of the active pattern from amorphous silicon to oxide semiconductor, which fundamentally alters the electrical properties. Oxide semiconductors exhibit higher carrier mobility due to their crystalline or amorphous structure with fewer dangling bonds, enabling high-speed operation while maintaining the thin-film transistor manufacturing advantages.
3Speed
If polysilicon is used in the active pattern, then the transistor has relatively high mobility, but the threshold voltage is non-uniform requiring additional compensating circuits
Solution Approach 1:
The patent changes the material composition parameter from polysilicon to oxide semiconductor, which fundamentally improves threshold voltage uniformity. Oxide semiconductors exhibit more consistent electrical properties across the wafer due to their uniform deposition characteristics and fewer defects, eliminating the need for compensating circuits while maintaining high mobility.
Data Source
AI summary
Disclosed is a method of manufacturing an oxide semiconductor device, including: forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming an active pattern on the gate insulating layer; forming a first mask pattern on the gate insulating layer and the active pattern; forming an insulating interlayer on the gate insulating layer, the active pattern, and the first mask pattern; forming a second mask pattern on the insulating interlayer, the second mask pattern comprising an opening that exposes a region where the first mask pattern is formed; forming contact holes exposing portions of the active pattern by patterning the insulating interlayer using the first mask pattern and the second mask pattern; and forming a source electrode and a drain electrode on the gate insulating layer by filling the contact holes, the drain electrode spaced apart from the source electrode.