Oxide Semiconductor Transistor Back Gate Contact via Inversion
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Solution Overview
Problem
The performance and reliability of oxide semiconductor field effect transistors (OSFETs) are degraded due to the uneven and rough interface between the back gate and the back gate dielectric caused by the manufacturing process, particularly due to the chemical mechanical polishing (CMP) process which results in a protruding back gate and surface unevenness.
Innovation Solution
The back gate contact process is integrated into the OSFET manufacturing process from the back side of the wafer, eliminating the need for CMP and ensuring the back gate is formed after the oxide semiconductor layer, thus avoiding surface unevenness by forming a back gate as a contact plug extending to the gate insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical mechanical polishing (CMP) is used to form the back gate, then the back gate can be formed at the required position, but the interface between the back gate and back gate dielectric becomes uneven and rough
Solution Approach 1:
Instead of forming the back gate from the front side and then polishing, the patent inverts the approach by forming the back gate from the back side of the substrate. This eliminates the need for CMP polishing of the back gate interface, thereby avoiding surface unevenness while achieving precise back gate formation. The back gate is formed as a contact plug extending from the back side through the substrate to the gate insulating layer.
2Productivity
If the back gate is formed before the oxide semiconductor layer, then the back gate structure can be established early in the process, but surface unevenness occurs due to CMP processing
Solution Approach 1:
The patent applies preliminary action by forming the back gate structure early in the manufacturing process, but does so from the back side of the substrate before depositing the oxide semiconductor layer on the front side. This preliminary formation of the back gate as a contact plug avoids subsequent CMP processing that would cause surface unevenness, thereby maintaining both process efficiency and surface flatness.
3Ease of manufacture
If conventional front-side back gate formation is used, then the manufacturing process is simpler, but the interface between back gate and dielectric becomes rough
Solution Approach 1:
The patent transitions from conventional front-side processing to back-side processing, utilizing another dimension (the back side of the substrate) to form the back gate. This dimensional change allows the back gate to be formed as a contact plug extending through the substrate, eliminating the need for CMP polishing and avoiding interface roughness while maintaining manufacturing simplicity.
Data Source
AI summary
A method of manufacturing an oxide semiconductor transistor is provided in the present invention, which includes the step of providing an oxide semiconductor transistor on the front side of a substrate, attaching a wafer on the front side of the substrate, forming a contact hole extending from the back side of the substrate to the oxide semiconductor layer of the oxide semiconductor transistor, and filling the contact hole with metal material to form a back gate of the oxide semiconductor transistor.