Oxide Semiconductor Buried Channel Transistor
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The electrical characteristics of transistors using oxide semiconductors are degraded due to impurity mixing and interface states between the oxide semiconductor layer and the insulating layer, leading to reduced field-effect mobility and reliability.
Innovation Solution
A transistor structure is implemented with a stack of oxide semiconductor layers, where the channel is sandwiched between buffer layers with lower carrier density, and the oxide semiconductor layer functioning as the channel contains an n-type impurity with varying concentration, separating the channel from the interface with the insulating layer to form a buried channel, thereby reducing interface scattering and trap levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the oxide semiconductor layer is placed in direct contact with the insulating layer, then the device structure is simple, but interface scattering and trap levels degrade field-effect mobility
Solution Approach 1:
The oxide semiconductor layer is divided into multiple layers with different functions: a first oxide semiconductor layer in contact with the insulating layer serves as a buffer, while a second oxide semiconductor layer functions as the channel. This segmentation separates the channel from the interface with the insulating layer, reducing interface scattering and trap levels to improve field-effect mobility.
Solution Approach 2:
The first oxide semiconductor layer acts as an intermediary buffer layer between the insulating layer and the second oxide semiconductor layer (channel). This buffer layer prevents direct contact between the channel and the insulating layer, thereby reducing interface scattering and trap levels that would otherwise degrade field-effect mobility.
2Reliability
If the oxide semiconductor layer is placed in direct contact with the insulating layer, then the manufacturing process is simple, but impurity mixing degrades electrical characteristics
Solution Approach 1:
The oxide semiconductor layer is segmented into a first oxide semiconductor layer in contact with the insulating layer and a second oxide semiconductor layer serving as the channel. This segmentation prevents impurity mixing between the channel and the insulating layer, stabilizing electrical characteristics while maintaining a relatively simple layered structure.
3Reliability
If the n-type impurity concentration is uniform throughout the oxide semiconductor layer, then the manufacturing process is simple, but off-state current cannot be effectively controlled
Solution Approach 1:
The n-type impurity concentration is varied locally within the second oxide semiconductor layer (channel). The concentration is higher near the interface with the first oxide semiconductor layer and lower toward the top surface. This local variation in impurity concentration enables effective control of off-state current while maintaining good on-state characteristics.
Solution Approach 2:
The n-type impurity concentration parameter is changed within the second oxide semiconductor layer, creating a gradient from higher concentration near the interface to lower concentration at the top surface. This parameter change enables simultaneous optimization of off-state current control and on-state field-effect mobility.
Data Source
AI summary
High field-effect mobility is provided for a semiconductor device including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a transistor in which a stack of oxide semiconductor layers is provided over a gate electrode layer with a gate insulating layer provided therebetween, an oxide semiconductor layer functioning as a current path (channel) of the transistor and containing an n-type impurity is sandwiched between oxide semiconductor layers having lower conductivity than the oxide semiconductor layer. In the oxide semiconductor layer functioning as the channel, a region on the gate insulating layer side contains the n-type impurity at a higher concentration than a region on the back channel side. With such a structure, the channel can be separated from the interface between the oxide semiconductor stack and the insulating layer in contact with the oxide semiconductor stack, so that a buried channel can be formed.


