Oxide Semiconductor Channel Layer Carrier Gradient for TFT Mobility
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Solution Overview
Problem
Existing thin film transistors (TFTs) face challenges in achieving high mobility and a large on-off ratio, particularly due to limitations in electron carrier concentration, channel layer thickness, and productivity, especially when using single-material channel layers.
Innovation Solution
A thin film transistor with a channel layer formed from an oxide semiconductor having an average carrier concentration of 1×10^16/cm^3 to 5×10^19/cm^3, featuring a high carrier concentration region near the gate insulating film and a substantially homogeneous composition, achieved through sputtering techniques and heat treatment, allowing for efficient production using a single oxide semiconductor material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single oxide semiconductor material is used for the channel layer, then productivity and ease of manufacture are improved, but achieving both high mobility and large on-off ratio becomes difficult
Solution Approach 1:
The patent applies local quality by creating a carrier concentration gradient within the single oxide semiconductor layer. The region near the gate insulating film interface has a higher carrier concentration (1×10^18/cm³ to 1×10^20/cm³) compared to the bulk region (1×10^16/cm³ to 1×10^19/cm³). This spatial variation in carrier concentration allows the channel layer to simultaneously achieve high mobility (through the high carrier concentration region) and large on-off ratio (through the low carrier concentration bulk), while using only a single oxide semiconductor material throughout the layer.
2Speed
If the carrier concentration in the channel layer is increased to improve mobility, then the on-off ratio decreases
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through a carrier concentration gradient. The channel layer contains a high carrier concentration region (1×10^18/cm³ to 1×10^20/cm³) near the gate insulating film interface that provides high electron mobility, while the bulk region maintains a lower carrier concentration (1×10^16/cm³ to 1×10^19/cm³) that ensures a large on-off ratio. This spatial differentiation of carrier concentration allows both parameters to be optimized simultaneously.
3Speed
If the channel layer thickness is reduced to improve switching speed, then the mobility and current drive capability deteriorate
Solution Approach 1:
The patent applies parameter changes by optimizing the thickness of the oxide semiconductor channel layer to be between 3 nm and 20 nm. This specific thickness range, combined with the carrier concentration gradient structure, allows the channel to achieve fast switching speed (due to the thin layer) while maintaining high mobility and current drive capability (due to the high carrier concentration region at the interface and the optimized thickness that ensures sufficient conduction path).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high mobility and a large on-off ratio, with field-effect mobility exceeding 40 cm^2/V·s and an on-off ratio of 10^7, while improving productivity and reducing production costs by using a single material for the channel layer.
Implementation Method 1
an amorphous oxide semiconductor film can be formed at room temperature by utilizing a sputtering method
Implementation Method 2
A thin film transistor with a channel layer formed from an oxide semiconductor having an average carrier concentration of 1×10^16/cm^3 to 5×10^19/cm^3, featuring a high carrier concentration region near the gate insulating film and a substantially homogeneous composition, achieved through sputtering techniques and heat treatment
Data Source
AI summary
A thin film transistor (1) includes a source electrode (50), a drain electrode (60), a gate electrode (20), a gate insulating film (30), and a channel layer (40) that is formed of an oxide semiconductor, the channel layer (40) having an average carrier concentration of 1×1016/cm3 to 5×1019/cm3, and including a high carrier concentration region (42) that is situated on the side of the gate insulating film (30) and has a carrier concentration higher than the average carrier concentration, and the channel layer (40) having a substantially homogenous composition.