Oxide Semiconductor Circuit Board Wiring Etching
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Solution Overview
Problem
Conventional circuit boards using oxide semiconductors for high electron mobility suffer from semiconductor layer loss during the wet etching process for aluminum wirings, leading to reduced reliability.
Innovation Solution
The circuit board design incorporates source and drain wirings formed by stacking a metal layer other than aluminum and an aluminum layer, with the latter being etched using dry etching to minimize oxide semiconductor loss, ensuring reliable operation with low-resistance aluminum wirings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If oxide semiconductor is used as semiconductor layer to increase electron mobility, then electron mobility is improved, but semiconductor layer is removed by wet etching solution for aluminum wirings
Solution Approach 1:
A protective film is introduced as an intermediary layer between the oxide semiconductor layer and the wet etching solution. This protective film selectively prevents the etching solution from contacting and removing the oxide semiconductor layer, while allowing the aluminum wiring to be etched. The protective film acts as a mediator that enables the etching process to proceed without damaging the semiconductor layer.
Solution Approach 2:
The protective film is designed as a temporary, disposable element that is present only during the etching process. After serving its protective function, the protective film is removed in a subsequent step. This approach uses a cheap, temporary protective layer rather than trying to make the oxide semiconductor layer itself resistant to etching.
2Reliability
If conventional a-Si is used for semiconductor layer, then wet etching resistance is improved, but electron mobility is reduced
Solution Approach 1:
Different regions of the structure are given different properties: the oxide semiconductor layer maintains its high electron mobility characteristics, while the protective film provides the wet etching resistance. This local differentiation of functions allows each layer to optimize for its specific purpose without compromising the other.
Solution Approach 2:
The structure employs a composite of different materials with complementary properties: oxide semiconductor for high electron mobility and a protective film material (such as silicon nitride or silicon oxide) for wet etching resistance. This composite approach combines the advantages of different materials to achieve both high mobility and etching resistance.
3Ease of manufacture
If five-sheet mask process with channel etching is used, then wiring formation is achieved, but oxide semiconductor layer becomes thinner or lost
Solution Approach 1:
The protective film is formed in advance, before the wet etching process begins. This preliminary protective action ensures that when the wet etching solution is applied, the oxide semiconductor layer is already shielded and cannot be damaged. The protective film is prepared as part of the masking structure before the critical etching step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the reliability of circuit boards with oxide semiconductor TFTs by preventing semiconductor layer loss during the etching process, enhancing the overall performance and durability.
Implementation Method 1
the latter being etched using dry etching to minimize oxide semiconductor loss
Data Source
AI summary
The present invention provides a highly reliable circuit board that includes TFTs a semiconductor layer of which is formed from an oxide semiconductor; and low-resistance aluminum wirings. The circuit board of the present invention includes an oxide semiconductor layer; source wirings; and drain wirings, wherein each of the source wirings and the drain wirings includes a portion in contact with the semiconductor layer, portions of the source wirings in contact with the semiconductor layer and respective portions of the drain wirings in contact with the semiconductor layer spacedly facing each other, and the source wirings and the drain wirings are formed by stacking a layer formed from a metal other than aluminum and a layer containing aluminum.