Oxide Semiconductor Transistor Memory Cell for Data Retention
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Solution Overview
Problem
Current semiconductor memory devices face challenges in maintaining data retention without power supply and suffer from limited write cycles due to transistor degradation and high voltage requirements, especially in flash memory, which limits their application in high-frequency data rewriting scenarios.
Innovation Solution
A semiconductor device is designed with a stack of transistors using an oxide semiconductor and another material, featuring a unique structure that includes a source line, bit line, signal lines, word lines, and memory cells with specific transistor configurations to enable long-term data retention without refreshing, high-speed operation, and multivalued storage without the need for high voltage or erasing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If flash memory uses floating gate with tunnel current for data storage, then data holding period becomes extremely long, but gate insulating layer deteriorates after numerous writing operations
Solution Approach 1:
The patent divides the memory structure into two separate transistors: a first transistor with a floating gate for long-term data storage, and a second transistor with an oxide semiconductor layer for low-leakage data holding. This segmentation allows each transistor to specialize in different functions, resolving the contradiction between long data retention and writing durability.
Solution Approach 2:
The patent combines two different semiconductor materials: conventional semiconductor material for the first transistor and oxide semiconductor material for the second transistor. This composite approach leverages the advantages of both materials - the floating gate capability of conventional semiconductors and the low off-state current of oxide semiconductors - to achieve both long data holding period and writing operation reliability.
2Ease of operation
If DRAM accumulates electric charge in capacitor for data storage, then writing operation is needed whenever data is read, but this increases power consumption
Solution Approach 1:
The oxide semiconductor transistor in the second transistor 162 provides extremely low off-state current, enabling the memory to hold data without continuous power supply or refreshing operations. This self-maintaining capability eliminates the need for frequent writing operations required by DRAM, significantly reducing power consumption while maintaining data accessibility.
3Duration of action of stationary object
If SRAM uses flip flop circuit for data storage, then refreshing operation is not needed, but cost per storage capacity becomes high
Solution Approach 1:
The patent extracts the data holding function from the complex flip-flop circuitry of SRAM and implements it using the inherent low-leakage properties of oxide semiconductor transistors. By removing the need for complex feedback circuits and multiple transistors per storage cell, the design achieves SRAM-like data retention without the associated complexity and cost.
4Productivity
If flash memory requires high voltage for charge injection to floating gate, then writing speed increases, but high voltage requirements limit application in high-frequency data rewriting
Solution Approach 1:
The patent changes the operational parameters of the memory system by using oxide semiconductor transistors that operate at standard voltages rather than requiring high voltage for charge injection. This parameter change enables high-frequency data rewriting applications while maintaining fast writing speeds through the low off-state current特性 of oxide semiconductors, which allow rapid charge accumulation without high voltage stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for prolonged data retention, reduced power consumption, and increased storage capacity with improved reliability by leveraging the low off-state current of oxide semiconductor transistors and the high-speed capabilities of transistors using other materials, eliminating the need for refreshing and erasing operations.
Implementation Method 1
a second transistor 162 which uses an oxide semiconductor; the transistor 162 has extremely small off-state current; by using the transistor 162, stored data can be held for an extremely long time
Data Source
AI summary
Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor.