Oxide Semiconductor Layer Deoxidation for Low-Resistance 3D Memory
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Solution Overview
Problem
In three-dimensional nonvolatile semiconductor memory devices, the resistance between memory cells increases due to the expansion of impurity diffusion layers during heat treatment, impairing performance and integration.
Innovation Solution
The implementation of low-resistance areas within oxide semiconductor layers by deoxidizing them with interlayer insulating layers, such as silicon-rich oxide silicon or hydrogen-rich insulating layers, which maintains the structure's integrity and reduces resistance, preventing excessive expansion during thermal treatment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If doping is performed to form impurity diffusion layers to reduce resistance between memory cells, then resistance is reduced and read/write speed is improved, but the impurity diffusion layers expand during heat treatment which impairs device performance and integration
Solution Approach 1:
The patent changes the chemical composition parameter of the channel layer by forming a silicon-rich oxide silicon layer instead of a conventional silicon layer. This compositional change allows the layer to serve as both the channel and impurity diffusion layer, eliminating the need for separate doping processes that cause expansion issues.
Solution Approach 2:
The patent uses a composite silicon-rich oxide silicon layer that combines properties of both channel layer and impurity diffusion layer. This composite material approach allows simultaneous achievement of low resistance and controlled dimensions without the harmful expansion effect of conventional doped silicon layers.
2Quantity of substance
If three-dimensional vertical-channel stacked structure is adopted to increase integration density, then capacity and degree of integration are improved, but resistance between memory cells increases and read/write speed decreases
Solution Approach 1:
The patent changes the material composition parameter by using silicon-rich oxide silicon instead of conventional silicon. This compositional change enables the material to simultaneously provide the three-dimensional vertical-channel structure for high integration and the impurity diffusion capability for low resistance, resolving the contradiction between integration density and resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-speed read/write operations and suppresses the short-channel effect, achieving high performance and integration in three-dimensional semiconductor memory devices.
Implementation Method 1
a low-resistance area formed in an oxide semiconductor layer by deoxidizing the oxide semiconductor layer with an interlayer insulating layer
Data Source
AI summary
According to one embodiment, a memory device includes a first stacked layer structure stacked in order of a first insulating layer, a first electrode layer, . . . an n-th insulating layer, an n-th electrode layer, and an (n+1)-th insulating layer in a first direction perpendicular to a surface of a semiconductor substrate, where n is a natural number, an oxide semiconductor layer extending through the first to n-th electrode layers in the first direction, a second stacked layer structure provided between the first to n-th electrode layers and the oxide semiconductor layer, and including a charge storage layer which storages charges, and a area provided in the oxide semiconductor layer.