Oxide Semiconductor Protective Circuit for Display Devices
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Solution Overview
Problem
Existing display devices face challenges in achieving high field effect mobility and reliable operation at low temperatures, with thin film transistors using amorphous silicon having low mobility and those using polycrystalline silicon requiring complex crystallization processes, while also needing compact protective circuits to reduce device size.
Innovation Solution
A display device structure incorporating a protective circuit with a non-linear element using an oxide semiconductor, where the first or second wiring layer is directly connected to the gate electrode, reducing contact resistance and area occupancy, and utilizing oxide semiconductor layers to enhance stability and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a protective circuit is formed using conventional structures, then the display device can be manufactured, but the area occupied by the protective circuit is large
Solution Approach 1:
The patent combines the protective circuit function with the existing pixel electrode structure by forming the protective circuit in the same region as the pixel electrode, thereby merging two functions into one space and reducing the overall area occupied by the protective circuit
Solution Approach 2:
The patent utilizes the vertical stacking dimension by forming multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) stacked above each other, transforming a planar layout problem into a three-dimensional structure to reduce footprint area
2Speed
If thin film transistor is manufactured using amorphous silicon, then it can be formed over a glass substrate with a larger area, but the field effect mobility is low
Solution Approach 1:
The patent changes the material parameter from amorphous silicon to oxide semiconductor, which fundamentally alters the electrical properties to achieve high field effect mobility while maintaining compatibility with low-temperature manufacturing processes suitable for large-area glass substrates
3Speed
If thin film transistor is manufactured using polycrystalline silicon, then the field effect mobility is high, but a crystallization step such as laser annealing is necessary
Solution Approach 1:
The patent changes the semiconductor material from polycrystalline silicon to oxide semiconductor, eliminating the need for high-temperature crystallization steps like laser annealing, thereby simplifying the manufacturing process while maintaining high field effect mobility
Solution Approach 2:
The patent replaces the expensive and complex laser annealing process with a simpler, lower-cost oxide semiconductor deposition process that achieves similar or better performance without requiring high-energy crystallization steps
4Area of stationary object
If the first wiring layer and second wiring layer are not directly connected to the gate electrode, then the manufacturing process is simpler, but the contact resistance is higher and the area occupancy is larger
Solution Approach 1:
The patent merges the wiring layers with the gate electrode structure by forming the first and second wiring layers in direct contact with the gate electrode, combining the gate electrode and wiring functions into an integrated structure that reduces both area and contact resistance
Solution Approach 2:
The patent creates equipotential connections by directly contacting the wiring layers with the gate electrode, ensuring equal potential at the connection points and minimizing contact resistance through direct electrical contact rather than indirect connections
Data Source
AI summary
The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.


