Oxide Semiconductor Transistor with Dopant Regions for Stability

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Solution Overview

Problem

Miniaturization of silicon semiconductor transistors leads to fluctuations in electric characteristics, such as negative shifts in threshold voltage, due to short channel lengths, and oxide semiconductor transistors have low carrier density, resulting in instability in electric characteristics.

Innovation Solution

Incorporating a region with dopants in the oxide semiconductor film, specifically a channel formation region and paired regions, to relieve the electric field and reduce fluctuations, using c-axis aligned crystalline oxide semiconductor (CAAC-OS) and polycrystalline regions with controlled dopant concentrations to stabilize the transistor's performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If the channel length is shortened for miniaturization, then the device size is reduced, but fluctuation in electric characteristics such as threshold voltage occurs

Engineering Contradiction:
Improvechannel lengthVSAvoidelectric characteristic stability
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by creating regions with different dopant concentrations within the oxide semiconductor layer. Specifically, high-concentration dopant regions are formed at the source and drain sides while the channel region maintains lower dopant concentration. This localized differentiation allows the channel length to be shortened for miniaturization while the high-concentration dopant regions provide electric field relief that stabilizes the threshold voltage, thus resolving the contradiction between miniaturization and electric characteristic stability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes parameter changes by varying the dopant concentration across different regions of the oxide semiconductor layer. The dopant concentration is changed from low in the channel region to high in the source/drain regions, creating a gradient structure. This parameter variation enables the device to achieve both short channel length for miniaturization and stable threshold voltage through the electric field relief effect of the high-concentration dopant regions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces fluctuations in electric characteristics and improves the reliability of the semiconductor device by stabilizing the threshold voltage and increasing the on-state current, enabling miniaturization without degrading performance.

Implementation Method 1

the channel formation region includes a crystal portion in which atoms are arranged in a triangle, a hexagon, a regular triangle, or a regular hexagon when seen from the direction perpendicular to the a-b plane of the non-single-crystal and in which metal atoms or metal atoms and oxygen atoms are arranged in layers when seen from the direction perpendicular to the c-axis

Methodology Applied
Scientific EffectC-axis aligned crystalline structure: Crystallisation

Implementation Method 2

a region containing dopant is provided in an oxide semiconductor film including a channel formation region. Specifically, a channel formation region and a pair of regions containing dopant are provided in the oxide semiconductor film

Methodology Applied
Scientific EffectDopant: Dopants

Data Source

PatentUS9450104B2Semiconductor device and manufacturing method thereof
Publication Date: 2016.09.20 SEMICON ENERGY LAB CO LTD
  • US9450104B2 patent drawing
  • US9450104B2 patent drawing
  • US9450104B2 patent drawing

AI summary

The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.