Oxide Semiconductor Gate Holes for Ion Uniformity
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Solution Overview
Problem
Existing display devices, particularly OLEDs, face challenges in maintaining a uniform concentration of majority carrier supporting ions in the channel region of oxide semiconductor layers, which affects the threshold voltage of transistors and overall display performance.
Innovation Solution
Incorporating a gate pattern with multiple gate holes that allow for the uniform distribution of majority carrier supporting ions, such as hydrogen ions, across the channel region of the oxide semiconductor layer, ensuring a consistent concentration regardless of channel length, thereby regulating the threshold voltage of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional gate pattern without gate holes is used, then the gate pattern provides structural integrity and electrical connection, but the concentration of majority carrier supporting ions is non-uniform in the channel region, affecting threshold voltage consistency
Solution Approach 1:
The gate pattern is designed with multiple gate holes forming a porous structure that allows majority carrier supporting ions to pass through from the insulating film into the channel region. This porous configuration enables uniform ion distribution across the channel while maintaining the gate's electrical function, directly resolving the non-uniform ion concentration problem.
Solution Approach 2:
The gate holes act as intermediaries that facilitate the transfer of majority carrier supporting ions from the insulating film to the channel region. These holes serve as pathways that mediate the ion distribution process, ensuring uniform concentration without requiring direct contact between the insulating film and the entire channel region.
2Power
If the channel length of the transistor is increased, then the transistor can handle higher currents, but the threshold voltage becomes difficult to regulate due to non-uniform ion distribution
Solution Approach 1:
The porous gate structure with multiple holes ensures that majority carrier supporting ions are uniformly distributed along the entire channel length, including longer channels. This uniform distribution maintains consistent threshold voltage characteristics even when channel length is increased to enhance current handling capability.
Solution Approach 2:
The gate pattern is segmented into multiple regions with gate holes distributed throughout the channel length. This segmentation allows ions to be introduced at multiple points along the channel, ensuring uniform concentration distribution and consistent threshold voltage regulation regardless of the overall channel length.
3Reliability
If more majority carrier supporting ions are introduced into the channel region, then the threshold voltage can be regulated, but the ion concentration becomes non-uniform, particularly in longer channels
Solution Approach 1:
The gate pattern functions as a porous structure with multiple holes that distribute ions uniformly across the channel region. This porous configuration allows ions to be introduced through multiple pathways, preventing localized accumulation and ensuring uniform concentration distribution while maintaining effective threshold voltage control.
Solution Approach 2:
The ion introduction process is segmented into multiple pathways through the gate holes distributed along the channel. This segmentation of the ion delivery system ensures that ions are evenly distributed throughout the channel region, achieving both reliable threshold voltage control and uniform ion concentration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures a uniform concentration of carrier supporting ions in the channel region, maintaining a predetermined threshold voltage for transistors, regardless of channel length, thereby simplifying voltage regulation and enhancing display device performance.
Implementation Method 1
the insulating film includes majority carrier supporting ions, wherein the gate pattern includes a plurality of gate holes, wherein the gate holes are formed inside a region of the gate pattern that does not overlap with the channel region of the oxide semiconductor layer, and wherein the channel region of the oxide semiconductor layer includes the majority carrier supporting ions
Data Source
AI summary
A display device includes: a substrate; a gate pattern disposed on the substrate; an oxide semiconductor layer disposed on the substrate, the oxide semiconductor layer includes a channel region that overlaps with the gate pattern; and an insulating film disposed on the gate pattern, the insulating film includes majority carrier supporting ions, wherein the gate pattern includes a plurality of gate holes, wherein the gate holes are formed inside a region of the gate pattern that does not overlap with the channel region of the oxide semiconductor layer, and wherein the channel region of the oxide semiconductor layer includes the majority carrier supporting ions.