Oxide Semiconductor Transistor Gate Insulating Film Density Control

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Solution Overview

Problem

Transistors using oxide semiconductors face issues with varying electric characteristics due to trap levels at the interface between the oxide semiconductor film and the gate insulating film, leading to shifts in threshold voltage and increased subthreshold swing, especially under gate BT stress tests with light irradiation.

Innovation Solution

A transistor design incorporating a gate insulating film with high film density and few defects, specifically silicon oxide or silicon oxynitride films with densities between 2.26 and 2.63 g/cm3 and low spin density, to minimize variations in electric characteristics over time and under stress tests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a gate insulating film with conventional density is used in a transistor with oxide semiconductor, then the manufacturing process is simpler, but the electric characteristics vary among transistors due to trap levels at the interface

Engineering Contradiction:
Improveelectric characteristic stabilityVSAvoidfilm density control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by precisely controlling the film density of the gate insulating film to be 2.26 g/cm³ or higher, and adjusting the oxygen partial pressure during formation to 10 Pa or higher. These parameter optimizations reduce trap levels at the interface between the gate insulating film and oxide semiconductor, thereby stabilizing electric characteristics such as threshold voltage across transistors.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the trap level is present at the interface between oxide semiconductor film and gate insulating film, then the transistor can be manufactured with conventional materials, but the threshold voltage shifts and subthreshold swing increases over time

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidinsulating film formation process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs an inert atmosphere approach by forming the gate insulating film in an oxygen-rich environment with oxygen partial pressure of 10 Pa or higher. This inert oxygen atmosphere prevents the formation of trap levels and defects at the interface, ensuring long-term stability of threshold voltage and reducing subthreshold swing without significantly complicating the manufacturing process.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

3Reliability

If conventional gate insulating film is used, then the manufacturing process is simpler, but the transistor characteristics change due to gate BT stress test with light irradiation

Engineering Contradiction:
Improvestress test performanceVSAvoidfilm formation conditions
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by optimizing the oxygen partial pressure during gate insulating film formation to 10 Pa or higher, and controlling the film density to 2.26 g/cm³ or higher. These parameter adjustments create a more robust film structure that resists degradation under gate BT stress test with light irradiation, improving reliability while maintaining manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution results in transistors with stable electric characteristics and reduced variations in threshold voltage, enhancing reliability and performance by reducing defects and trap levels at the interface.

Implementation Method 1

whose spin density of a signal with a g value of 2.001 is 2×10^15 spins/cm³ or less in electron spin resonance

Methodology Applied
Scientific EffectElectron spin resonance: Electron Paramagnetic Resonance

Data Source

PatentUS9054200B2Semiconductor device
Publication Date: 2015.06.09 SEMICON ENERGY LAB CO LTD
  • US9054200B2 patent drawing
  • US9054200B2 patent drawing
  • US9054200B2 patent drawing

AI summary

Electric characteristics of a semiconductor device using an oxide semiconductor are improved. Further, a highly reliable semiconductor device in which a variation in electric characteristics with time or a variation in electric characteristics due to a gate BT stress test with light irradiation is small is manufactured. A transistor includes a gate electrode, an oxide semiconductor film overlapping with part of the gate electrode with a gate insulating film therebetween, and a pair of electrodes in contact with the oxide semiconductor film. The gate insulating film is an insulating film whose film density is higher than or equal to 2.26 g/cm3 and lower than or equal to 2.63 g/cm3 and whose spin density of a signal with a g value of 2.001 is 2×1015 spins/cm3 or less in electron spin resonance.