Oxide Semiconductor Gate Structure for Hydrogen Blocking
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Solution Overview
Problem
Semiconductor devices using oxide semiconductors face challenges in preventing hydrogen from entering the channel region, which affects the electrical characteristics and manufacturing yield due to hydrogen diffusion from the oxide layer, leading to reduced reliability.
Innovation Solution
A semiconductor device configuration with a hydrogen-trapping region is created by dividing the oxide insulating layer into regions with varying impurity concentrations, where the oxide insulating layers in the second and third regions trap hydrogen, preventing it from reaching the channel region, while allowing hydrogen to be supplied to the source and drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an oxide layer containing excessive oxygen is used as an insulating layer to suppress hydrogen from entering the channel region, then hydrogen diffusion into the channel is reduced, but the reliability of the semiconductor device is significantly reduced due to electron trapping
Solution Approach 1:
The oxide insulating layer is divided into multiple regions with different impurity concentrations: a first region (channel area) with low impurity concentration to maintain reliability, and second and third regions (source/drain areas) with high impurity concentration to trap hydrogen. This segmentation allows different functional requirements to be satisfied in different spatial locations.
Solution Approach 2:
Different regions of the oxide insulating layer are given different local qualities through controlled impurity concentration variations. The high-impurity regions provide hydrogen trapping capability while the low-impurity region maintains electrical stability, achieving local optimization of functional properties.
2Reliability
If hydrogen is supplied to the source region and drain region to form low-resistance regions, then the conductivity of source and drain is improved, but hydrogen diffusion into the channel region causes threshold voltage variation and reduces manufacturing yield
Solution Approach 1:
The oxide insulating layer is segmented into hydrogen-trapping regions (second and third regions) positioned adjacent to the source and drain regions, while maintaining a low-impurity first region above the channel. This spatial segmentation enables selective hydrogen supply to source/drain areas while preventing hydrogen intrusion into the channel region, thereby simultaneously achieving good source/drain conductivity and stable threshold voltage.
Solution Approach 2:
The high-impurity regions of the oxide insulating layer act as intermediary hydrogen-trapping zones between the hydrogen-supplied source/drain regions and the channel region. These intermediary regions capture excess hydrogen, allowing the source and drain to receive sufficient hydrogen for low resistance while preventing hydrogen from reaching the channel and causing threshold voltage shifts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses hydrogen entry into the channel region, stabilizing the electrical characteristics and improving the manufacturing yield by enhancing the reliability of the semiconductor device.
Implementation Method 1
the oxide insulating layers in the second and third regions trap hydrogen, preventing it from reaching the channel region
Data Source
AI summary
A semiconductor device according to an embodiment includes: an oxide insulating layer; an oxide semiconductor layer; a gate electrode; a gate insulating layer; and a first insulating layer, wherein the semiconductor device is divided into a first to a third regions, a thickness of the gate insulating layer in the first region is 200 nm or more, the gate electrode contacts the first insulating layer in the first region, the oxide semiconductor layer contacts the first insulating layer in the second region, an amount of impurities contained in the oxide semiconductor layer in the second region is greater than an amount of impurities contained in the oxide semiconductor layer in the first region, and an amount of impurities contained in the oxide insulating layer in the third region is greater than an amount of impurities contained in the oxide insulating layer in the second region.