Oxide Semiconductor Transistor Layout for Low-Resistance Ion Implantation
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Solution Overview
Problem
In semiconductor device manufacturing, existing methods face challenges in optimizing the ion implantation process for oxide semiconductors, leading to increased contact resistance and manufacturing costs, while also risking insulation impairment and short circuits.
Innovation Solution
A method involving the formation of a semiconductor device with a polycrystalline silicon semiconductor and an oxide semiconductor, where ion implantation is performed without removing the resist mask, allowing for precise impurity distribution and reduced contact resistance between electrodes, thereby improving drive capability and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If ion implantation is performed after removing the resist mask, then the ion implantation process is simpler, but unwanted ion implantation into the polycrystalline silicon semiconductor occurs, increasing contact resistance
Solution Approach 1:
The gate electrode is formed in advance before ion implantation, and the resist mask is kept in place during ion implantation to prevent unwanted doping. This preliminary arrangement of the gate electrode structure allows selective ion implantation into the oxide semiconductor while blocking the polycrystalline silicon semiconductor, thereby reducing contact resistance without requiring additional process steps.
2Reliability
If ion implantation is performed with the resist mask in place, then contact resistance is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The gate electrode serves multiple functions: it acts as both the functional gate structure for the transistor and as a mask during ion implantation to protect the polycrystalline silicon semiconductor. This multi-functionality eliminates the need for separate mask structures, simplifying the overall manufacturing process while maintaining low contact resistance through selective ion implantation.
Solution Approach 2:
The resist mask and gate electrode formation processes are merged into a single patterning step. The same resist pattern that defines the gate electrode also serves as the mask for ion implantation, combining two functions into one process sequence and reducing the total number of manufacturing steps.
3Ease of manufacture
If the resist mask is removed before ion implantation, then the manufacturing process is simpler, but insulation impairment and short circuits may occur
Solution Approach 1:
The gate electrode is formed in advance before ion implantation, and the resist mask is kept in place during ion implantation to prevent unwanted doping. This preliminary arrangement of the gate electrode structure allows selective ion implantation into the oxide semiconductor while blocking the polycrystalline silicon semiconductor, thereby reducing contact resistance without requiring additional process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the drive capability and reliability of transistors by minimizing unwanted ion implantation into the polycrystalline silicon semiconductor, reducing manufacturing costs, and preventing insulation impairment.
Implementation Method 1
performing ion implantation into the oxide semiconductor without removing the resist
Data Source
AI summary
According to one embodiment, a method for manufacturing a semiconductor device includes forming a first insulating layer above a polycrystalline silicon semiconductor, forming an oxide semiconductor on the first insulating layer, forming a second insulating layer on the oxide semiconductor, forming contact holes penetrating to the polycrystalline silicon semiconductor in insulating layers including the first insulating layer and the second insulating layer, forming a metal film on the second insulating layer, forming a patterned resist on the metal film, etching the metal film using the resist as a mask, performing ion implantation into the oxide semiconductor without removing the resist, and removing the resist.


