Oxide Semiconductor Memory Circuit for Leakage-Resistant Data Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices miniaturize, the gate leakage current of Si transistors increases, making it difficult to maintain data for a sufficiently long time with existing memory devices, and existing methods for reducing power consumption are either complex or unsuitable for short power interruptions.
Innovation Solution
A memory device using a memory circuit with two transistors and a storage capacitor, where one terminal of the capacitor is connected to the source or drain of each transistor, utilizing oxide semiconductor transistors with extremely low off leakage current to maintain signal integrity and reduce power consumption, even during short power interruptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Si transistors are used in memory devices, then manufacturing is easier and speed is higher, but gate leakage current increases as devices miniaturize, making it difficult to maintain data for sufficiently long time
Solution Approach 1:
The patent changes the material parameter of the transistor from conventional Si to oxide semiconductor, fundamentally altering the electrical characteristics to achieve extremely low off-state leakage current while maintaining compatibility with existing manufacturing processes
Solution Approach 2:
The patent employs a hybrid structure combining oxide semiconductor transistors for data holding and conventional Si transistors for control operations, leveraging the advantages of both material systems in different functional regions
2Reliability
If nonvolatile memory circuit using magnetic element or ferroelectric is used, then data retention during power interruption is improved, but manufacturing process becomes complicated
Solution Approach 1:
The patent changes the transistor material parameter to oxide semiconductor, which inherently provides extremely low off-state leakage current, eliminating the need for complex magnetic elements or ferroelectric materials while achieving similar data retention functionality
Solution Approach 2:
The patent extracts and eliminates the need for complex nonvolatile memory structures by using oxide semiconductor transistors that can maintain data during power interruption through their inherent low leakage characteristics
3Reliability
If external memory circuit is used for data backup, then data retention during power interruption is improved, but access time increases significantly
Solution Approach 1:
The patent merges the data holding function and power interruption resistance into the same memory circuit structure using oxide semiconductor transistors, eliminating the need for separate external backup memory and reducing access time
4Use of energy by moving object
If power supply voltage is stopped to reduce power consumption, then energy consumption is reduced, but data in volatile memory circuit is lost
Solution Approach 1:
The patent changes the transistor material to oxide semiconductor with extremely low off-state leakage current, enabling the memory to maintain data during power interruption and allowing safe power cycling for energy reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a memory device with reduced power consumption and no performance degradation due to data rewriting, capable of maintaining signals for a long time even with high gate leakage, and supports efficient power management during short power interruptions.
Implementation Method 1
a transistor whose off leakage current is extremely low (e.g., a transistor using an oxide semiconductor for a channel formation region)
Data Source
AI summary
A memory device includes a first memory circuit including a silicon transistor, a selection circuit including a silicon transistor, and a second memory circuit including oxide semiconductor transistors and a storage capacitor, in which one terminal of the storage capacitor is connected to a portion where two oxide semiconductor transistors are connected in series, an output of the second memory circuit is connected to a second input terminal of the selection circuit, and an input of the second memory circuit is connected to a first input terminal of the selection circuit or an output terminal of the first memory circuit.