Oxide Semiconductor Logic Device for Low Power and Fast Start-Up
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Solution Overview
Problem
Programmable logic devices face challenges with long start-up times due to the use of volatile memory for configuration data, and existing non-volatile solutions like EEPROM require high writing voltage or have limitations on read operations, while FeRAM is not suitable for high integration and low power consumption.
Innovation Solution
A programmable logic device utilizing a non-volatile memory element with a transistor in an oxide semiconductor film and an arithmetic circuit, allowing for selective data storage and retrieval with low off-state current, enabling short start-up times and low power operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a volatile memory (SRAM) is used for configuration memory, then the device can operate with simple structure, but the start-up time becomes long because configuration data is lost when power is stopped and must be rewritten
Solution Approach 1:
The patent changes the fundamental parameter of memory volatility by using a non-volatile memory structure based on oxide semiconductor transistors. This allows configuration data to be retained without power, eliminating the need for rewriting after power cycles and thus reducing start-up time without requiring complex external storage interfaces
Solution Approach 2:
The patent employs a memory structure that inherently retains data without requiring continuous power or refresh operations. The oxide semiconductor transistor maintains configuration data in its off-state, effectively making the memory 'non-disposable' and eliminating the need for frequent rewriting that plagues volatile memory systems
2Loss of time
If an EEPROM is used for configuration memory to reduce start-up time, then data retention is improved, but the device requires high writing voltage and step-up circuits which increase complexity and power consumption
Solution Approach 1:
The patent changes the voltage parameter requirement by using a novel non-volatile memory structure based on oxide semiconductor transistors that can be written using standard low voltages. This eliminates the need for high-voltage generation circuits and step-up circuits, reducing both complexity and power consumption while maintaining data retention capabilities
Solution Approach 2:
The patent replaces the complex electrical mechanism of high-voltage EEPROM writing with a simpler low-voltage field-effect mechanism using oxide semiconductor transistors. The memory is written by controlling the transistor's on/off state with standard logic voltages, eliminating the need for complex voltage multiplication circuits
3Loss of time
If FeRAM is used for configuration memory, then start-up time is reduced with non-volatile storage, but the number of read operations is limited which reduces reliability for configuration purposes
Solution Approach 1:
The patent changes the durability parameter of the memory by using oxide semiconductor transistors that can withstand a very large number of read and write operations. The field-effect mechanism used for writing does not degrade the transistor characteristics, enabling near-unlimited rewriting capability compared to FeRAM's limited read cycles
4Ease of manufacture
If conventional transistors are used in configuration memory, then the device can be manufactured with standard processes, but the off-state current is high which increases power consumption and reduces data retention
Solution Approach 1:
The patent uses a composite material structure combining oxide semiconductor films with standard silicon-based CMOS processes. The oxide semiconductor layer provides low off-state current characteristics while being manufactured using adapted standard semiconductor fabrication processes, achieving both low power consumption and manufacturing compatibility
Solution Approach 2:
The patent applies the oxide semiconductor material specifically to the channel region of the transistor where low off-state current is most critical for data retention. This localized application of special material properties allows the rest of the device to use standard materials and processes, maintaining ease of manufacture while achieving superior power characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a programmable logic device with short start-up times, high integration, and low power consumption by using a non-volatile memory element with a transistor in an oxide semiconductor film, which maintains data retention and improves rewritability.
Implementation Method 1
a transistor whose channel region is in an oxide semiconductor film... Configuration data is selectively changed and output by the selection circuit in accordance with an input signal
Data Source
AI summary
An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal.