Semiconductor Device with Oxide Transistor for Long Data Retention
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Solution Overview
Problem
Current semiconductor storage devices, such as DRAM and SRAM, face limitations in data retention due to leakage currents and require frequent refresh operations, while flash memory suffers from degradation of the gate insulating layer leading to limited writing cycles and high voltage requirements, making them unsuitable for frequent data rewriting applications.
Innovation Solution
A semiconductor device with a novel structure incorporating a first and second transistor, where the second transistor includes an oxide semiconductor layer that overlaps with the source or drain region of the first transistor, reducing off-state current and eliminating the need for high voltage writing, and featuring a trench structure to enhance integration and storage capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a floating gate structure is used in flash memory to achieve nonvolatile storage, then data retention period is extremely long and refresh operation is not needed, but the gate insulating layer is degraded by tunneling current during writing operations, limiting the number of writing cycles
Solution Approach 1:
The patent changes the voltage parameter from high voltage (required for tunneling current in flash memory) to low voltage operation. The transistor structure with optimized channel length and gate control enables data storage through voltage threshold changes rather than charge injection, allowing unlimited writing cycles at standard voltage levels while maintaining nonvolatile characteristics.
Solution Approach 2:
The patent replaces the tunneling current mechanism (electrical field-based charge injection) with a transistor threshold voltage-based storage mechanism. This substitution eliminates the need for high voltage stress and tunneling current that degrade the gate insulating layer, while achieving similar nonvolatile storage functionality through controlled charge accumulation in the channel region.
2Duration of action of stationary object
If high voltage is applied to inject electric charge in a floating gate for flash memory writing, then data can be stored nonvolatily, but it requires a circuit for generating high voltage and takes comparatively long time to inject or remove electric charge
Solution Approach 1:
The patent extracts and removes the high voltage generation circuit from the memory device structure. By using a standard voltage-operated transistor mechanism instead of tunneling-based flash memory, the complex high voltage generation circuitry is eliminated entirely, simplifying the device while maintaining nonvolatile storage capability through transistor threshold control.
Solution Approach 2:
The patent skips the time-consuming charge injection and removal process by using a direct transistor switching mechanism. Data is written and read through standard transistor operation without the prolonged high voltage charge injection phase required in flash memory, significantly reducing write/erase time while maintaining data retention.
3Device complexity
If conventional transistors are used in DRAM for volatile storage, then the structure is simple and writing operation is fast, but leakage current between source and drain in off state causes short data retention period requiring frequent refresh operations
Solution Approach 1:
The patent employs a composite transistor structure combining standard semiconductor materials with specifically engineered channel characteristics. The transistor uses optimized material composition and structural design (including gate length and doping profiles) to achieve extremely low off-state leakage current while maintaining simple fabrication processes, enabling long data retention without complex refresh circuitry.
4Area of stationary object
If storage elements are miniaturized to increase storage capacity per unit area, then integration density is improved, but short channel effect increases making it difficult to control transistor operation
Solution Approach 1:
The patent addresses short channel effects by transitioning from planar transistor geometry to a vertically-oriented or three-dimensional transistor structure. This dimensional change allows the channel to be controlled from multiple directions (top and bottom gates), maintaining effective gate control even as the channel length is reduced for higher integration density, thereby suppressing short channel effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves long-term data retention without the need for frequent refresh operations and unlimited writing cycles, operates at high speed, and reduces power consumption, while maintaining high integration and storage capacity per unit area.
Implementation Method 1
one embodiment of the disclosed invention is a semiconductor device that includes a first transistor and a second transistor... an oxide semiconductor layer provided over the insulating layer to partly overlap with at least the first source region or the first drain region
Data Source
AI summary
With a combination of a transistor including an oxide semiconductor material and a transistor including a semiconductor material other than an oxide semiconductor, a semiconductor device with a novel structure in which data can be retained for a long time and does not have a limitation on the number of writing can be obtained. When a connection electrode for connecting the transistor including a semiconductor material other than an oxide semiconductor to the transistor including an oxide semiconductor material is smaller than an electrode of the transistor including a semiconductor material other than an oxide semiconductor that is connected to the connection electrode, the semiconductor device with a novel structure can be highly integrated and the storage capacity per unit area can be increased.