Oxide Semiconductor Layer Structure for High-Density Low-Power Memory
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high integration, favorable electrical characteristics, high on-state current, excellent frequency characteristics, and long data retention with low power consumption while maintaining high productivity and design flexibility.
Innovation Solution
A semiconductor device is designed with a specific structure involving multiple conductors and insulators, and oxide layers with varying resistance regions, including regions with phosphorus and boron, and oxygen vacancies, to enhance electrical performance and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional semiconductor devices are used, then existing electrical characteristics are maintained, but miniaturization and high integration are difficult to achieve
Solution Approach 1:
The patent applies parameter changes by transitioning from conventional silicon-based semiconductors to oxide semiconductors, fundamentally changing the material parameter to achieve both miniaturization and maintained electrical characteristics. The oxide semiconductor layer enables higher integration density while preserving reliability through its unique electrical properties.
Solution Approach 2:
The patent employs composite materials by combining oxide semiconductors with specific conductor materials (such as tungsten or copper) and insulator layers to create a multi-layered structure. This composite approach enables high integration while maintaining favorable electrical characteristics through the synergistic properties of each material layer.
2Productivity
If device size is reduced for higher integration, then integration density improves, but on-state current decreases
Solution Approach 1:
The patent changes the material parameter to oxide semiconductors, which have unique properties that allow maintaining high on-state current even in miniaturized devices. The oxide semiconductor's band structure and carrier mobility characteristics enable this behavior, resolving the trade-off between device size and current capability.
Solution Approach 2:
The patent applies local quality by creating specific doped regions within the oxide semiconductor structure, such as source and drain regions with different conductivity. This local variation in material properties allows the device to maintain high on-state current in miniaturized configurations by optimizing current flow paths locally.
3Loss of energy
If oxide semiconductors are used, then low leakage current is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the oxide semiconductor structure into distinct functional layers, including the oxide semiconductor layer, conductor layers, and insulator layers. This segmented approach allows each layer to be optimized independently for low leakage current while simplifying the overall manufacturing process through modular fabrication steps.
Solution Approach 2:
The patent uses intermediary layers, such as buffer oxide layers or transition layers between the oxide semiconductor and other materials, to facilitate manufacturing. These intermediary layers simplify the integration of oxide semiconductors into existing fabrication processes while maintaining the low leakage current characteristic.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves high integration, favorable electrical characteristics, high on-state current, excellent frequency characteristics, long data retention, and reduced power consumption, while maintaining high productivity and design flexibility.
Implementation Method 1
The resistance of the first region and the second region is lower than the resistance of the third region
Data Source
AI summary
The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.