Oxide Semiconductor Memory Cell Data Retention
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Solution Overview
Problem
Existing semiconductor storage devices require separate volatile and nonvolatile storage devices for saving and restoring data signals when power is turned off and on, which complicates the process.
Innovation Solution
A semiconductor storage device is designed with a transistor containing an oxide semiconductor and a capacitor, where data is held in a data holding portion connected to these components, allowing the potential of the data signal to be controlled by a data potential holding and control circuit without electric charge leakage through capacitive coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate volatile and nonvolatile storage devices are used to retain data during power-off periods, then data retention capability is improved, but device complexity and operational complexity increase due to separate save and restore operations
Solution Approach 1:
The patent merges volatile and nonvolatile storage functions into a single integrated circuit structure. The memory cell contains both a transistor with oxide semiconductor layer (for nonvolatile storage) and a capacitor (for volatile storage operation), eliminating the need for separate storage devices and their associated save/restore operations.
Solution Approach 2:
The memory cell achieves multi-functionality by combining volatile and nonvolatile storage capabilities in one device. The same memory cell can operate in volatile mode during powered operation and automatically retain data during power-off periods, eliminating the need for separate volatile and nonvolatile storage devices.
2Reliability
If separate volatile and nonvolatile storage devices are used for data retention, then data retention capability is improved, but operational complexity increases due to save and restore operations
Solution Approach 1:
The patent combines volatile and nonvolatile storage operations within the same memory cell, eliminating the need for separate save and restore operations. The integrated structure automatically maintains data across power cycles without requiring additional operational steps.
3Device complexity
If oxide semiconductor transistor and capacitor are integrated in the same memory cell, then device complexity is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the memory cell into distinct functional regions: the transistor portion with oxide semiconductor layer for nonvolatile storage and the capacitor portion for volatile storage operation. This segmentation allows for systematic manufacturing while achieving integration, reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables data retention and resumption without the need for saving and returning data between volatile and nonvolatile storage devices, simplifying the power management and reducing power consumption.
Implementation Method 1
The data potential control circuit can control the potential of the data signal held in the data holding portion without leaking electric charge by capacitive coupling through the capacitor
Data Source
AI summary
A semiconductor storage device which stops and resumes the supply of power supply voltage without the necessity of saving and returning a data signal between a volatile storage device and a nonvolatile storage device is provided. In the nonvolatile semiconductor storage device, the volatile storage device and the nonvolatile storage device are provided without separation. Specifically, in the semiconductor storage device, data is held in a data holding portion connected to a transistor including a semiconductor layer containing an oxide semiconductor and a capacitor. The potential of the data held in the data holding portion is controlled by a data potential holding circuit and a data potential control circuit. The data potential holding circuit can output data without leaking electric charge, and the data potential control circuit can control the potential of the data held in the data holding portion without leaking electric charge by capacitive coupling through the capacitor.