Semiconductor Memory Device Using Oxide Semiconductor Transistors
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in reducing power consumption, increasing integration density, and extending data retention time without limiting the number of rewriting cycles, with DRAM suffering from high power consumption and SRAM having limited integration due to the number of transistors per memory cell, and FGNVM having limited rewriting cycles and high power consumption.
Innovation Solution
A semiconductor memory device structure incorporating a writing transistor with low leakage current, a reading transistor with different conductivity type, and a capacitor with optimized capacitance, arranged in a matrix configuration to minimize power consumption and maximize integration density, allowing for over one million rewriting cycles and data retention for 10 hours or more without power supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a DRAM structure is used, then high integration density is achieved, but power consumption increases due to continuous refreshing
Solution Approach 1:
The memory device is segmented into two distinct memory cells: a first memory cell using a conventional transistor for high-speed access, and a second memory cell using an oxide semiconductor transistor for low-power data retention. This segmentation allows each cell type to serve its optimal function, resolving the contradiction between integration density and power consumption by distributing workloads across different memory architectures.
Solution Approach 2:
The system dynamically switches between active and standby modes, utilizing the oxide semiconductor transistor's ability to maintain data without power in standby state. This dynamic operation allows the memory to achieve high integration density during active use while minimizing power consumption during idle periods, effectively resolving the contradiction.
2Duration of action of stationary object
If an SRAM structure is used, then data retention without power is achieved, but integration density decreases due to six transistors per memory cell
Solution Approach 1:
The memory system is divided into two functional segments: SRAM cells for frequent access operations and oxide semiconductor-based cells for long-term data retention. This segmentation enables the system to achieve both high integration density (through compact oxide semiconductor cells) and extended data retention (through the inherent non-volatile properties of the oxide semiconductor segment).
Solution Approach 2:
The patent merges SRAM and oxide semiconductor memory technologies into a single hybrid memory cell structure. By combining the fast access characteristics of SRAM with the non-volatile data retention of oxide semiconductor memory, the system achieves both high integration density and extended data retention capability simultaneously.
3Duration of action of stationary object
If conventional FGNVM is used, then data retention without power is achieved, but rewriting times are limited to hundred thousand or less
Solution Approach 1:
The patent changes the material parameter from conventional floating gate materials to oxide semiconductor materials, which fundamentally alters the rewriting characteristics. This parameter change enables the memory to withstand one million or more rewriting cycles while maintaining data retention capability, resolving the contradiction between data retention and rewriting durability.
4Quantity of substance
If high voltage is applied for charge injection in FGNVM, then data storage is achieved, but gate insulating film deterioration occurs
Solution Approach 1:
The patent changes the operating voltage parameter from high voltage (conventional FGNVM) to low voltage (oxide semiconductor memory). This parameter change enables charge injection and data storage while preventing gate insulating film deterioration, as the oxide semiconductor structure allows efficient charge trapping at lower voltage stress, thereby resolving the contradiction between storage capacity and film durability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low power consumption, high integration density, and extended data retention, reducing the need for frequent refreshing and allowing for data storage without power loss, with the ability to store multiple stages of data within a narrow voltage range, enhancing the overall performance and reliability of the semiconductor memory device.
Implementation Method 1
a transistor including an oxide semiconductor and having a low leakage current in an off state
Implementation Method 2
one memory cell includes a writing transistor, a reading transistor, and a capacitor
Data Source
AI summary
An object is to provide a semiconductor memory device which stores data with the use of a transistor having small leakage current between a source and a drain in an off state as a writing transistor. In a matrix including a plurality of memory cells, gates of the writing transistors are connected to writing word lines. In each of the memory cells, a drain of the writing transistor is connected to a gate of a reading transistor, and the drain is connected to one electrode of a capacitor. Further, the other electrode of the capacitor is connected to a reading word line. In the semiconductor memory device in which the memory cells are connected in series so as to have a NAND structure, gates of the reading transistors are provided alternately, and the reading word line and the writing word line are shared.