Multi-Layer Oxide Semiconductor Structure for Electrical Stability
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Solution Overview
Problem
Semiconductor devices using oxide semiconductors face challenges with electrical characteristic degradation due to impurity mixing and oxygen vacancies, leading to unreliable performance.
Innovation Solution
A multi-layer structure of oxide semiconductor layers is implemented, with a crystalline indium zinc oxide layer as the carrier path and amorphous layers as barrier layers to suppress interface states and impurity entry, reducing oxygen vacancies and stabilizing electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single oxide semiconductor layer is used, then the device structure is simple, but impurity mixing and oxygen vacancies cause electrical characteristic degradation
Solution Approach 1:
The oxide semiconductor layer is divided into multiple sub-layers (first oxide semiconductor layer, second oxide semiconductor layer, and third oxide semiconductor layer) with different functions. The first and third layers serve as barrier layers to prevent impurity mixing, while the second layer serves as the main channel layer, thereby improving electrical characteristic stability without using a single complex layer
Solution Approach 2:
Different regions of the oxide semiconductor structure are assigned different material compositions and properties. The barrier layers have specific compositions optimized for impurity blocking, while the channel layer has compositions optimized for carrier transport, creating local quality variations that address different functional requirements simultaneously
2Reliability
If oxide semiconductor layers are in direct contact with silicon oxide film, then manufacturing is simple, but silicon impurity mixes into the channel causing electrical degradation
Solution Approach 1:
The first and third oxide semiconductor layers function as intermediary barrier layers between the silicon oxide film and the second oxide semiconductor layer. These intermediate layers prevent direct contact and impurity mixing while maintaining the necessary electrical functionality, thus protecting the channel from silicon impurity contamination
3Reliability
If trap states exist at the oxide semiconductor-insulating layer interface, then manufacturing is straightforward, but electrical characteristics such as threshold voltage and mobility deteriorate
Solution Approach 1:
The interface region is segmented into multiple oxide semiconductor layers with the first and third layers positioned to interface with insulating layers. This segmentation creates dedicated barrier layers that prevent trap state formation at critical interfaces while maintaining the channel functionality in the second layer
Solution Approach 2:
The first and third oxide semiconductor layers act as intermediary barrier layers between insulating layers and the channel layer, preventing direct interface contact that would generate trap states. These intermediate layers eliminate harmful interface effects while preserving electrical functionality
4Reliability
If oxygen vacancies are present in the oxide semiconductor layer, then manufacturing is easier, but long-term reliability is reduced
Solution Approach 1:
The oxide semiconductor structure is segmented into multiple layers where the first and third barrier layers are designed to suppress oxygen vacancy formation and migration. This segmentation isolates the channel layer from oxygen deficiency issues that might arise during manufacturing, thereby improving long-term reliability
Data Source
AI summary
A transistor having a multi-layer structure of oxide semiconductor layers is provided in which a second oxide semiconductor layer having a crystalline structure including indium zinc oxide is formed over a first oxide semiconductor layer having an amorphous structure, and at least a third oxide semiconductor layer is formed stacked over the second oxide semiconductor layer. The second oxide semiconductor layer mainly serves as a carrier path for the transistor. The first oxide semiconductor layer and the third oxide semiconductor layer each serve as a barrier layer for suppressing entrance of impurity states of an insulating layer in contact with the multi-layer structure to the carrier path.